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[OMAP-L137] McASP PDIR vs GPIO DIRn

For the OMAP_L137:

The McASP document says "Regardless of the pin function register (PFUNC) setting, each PDIR bit must be set to 1 for the specified pin to be enabled as an output ans each PDIR bit must be cleared to 0 for the specified pin to be an input." This statement is followed by two examples where the specific bits are assigned as McASP pins. No example is given for when the PFUNC setting assigns the pin as a GPIO pin.

Does the PDIR register actually apply for pins that are defined as GPIO pins? Also, does the PFUNC register interact with the PINMUX settings?

That is, if a pin is McASP do I need to set PINMUX, PFUNC (with PINMUX and PFUNC in agreement), and PDIR? Is that sufficient?

If a pin is GPIO, do I need to set PINMUX, PFUNC (with PINMUX and PFUNC in agreement, PDIR, and DIRn (with PDIR and DIRn in agreement)? Is that sufficient?

  • The McASP and GPIO are two separate peripherals and the PINMUX register selects which peripheral controls each pin.

    If you select McASP to control a particular pin, then inside the McASP module controls the pin; not the GPIO module.

    The comment from the McASP document is in the context of the McASP module only;  the McASP also has registers to allow you to directly control its pins as GPIO using the McASP PFUNC, McASP PDIR, etc.. register set.  

    Yes there's some redundancy here because the McASP module and the GPIO module both can provide GPIO functionality on a pin; and that's probably why it's confusing.   But only one of the two modules will control the pin at any given time, and this is selectable by PINMUX.

    Note that the PINMUX on the L137 doesn't affect the input path from pin to peripheral module, just the output and output enable of the IO.

    So, you could do something like toggle an IO through the GPIO module, but at the same time 'sense' this pin through the McASP module.