Which linker command file to use for EVMK2H ?

Hi Robby Sun,

Sorry for the bad experience.

I will re-look into your earlier post, please give the thread link as well.

Robby said:

This is an easy question: which linker command file should I use for the EVMK2H board? The board features a single 66AK2H14 SoC chip, with 4X Cortex-A15 + 8X C66x cores. I am using CCS 5.5.0.00077 and the onboard XDS2xx USB emulator to build, load, and run the code.

I guess, you mean to ask about the gel file to be loaded to connect to make "connect target" to the first DSP core and then load and run the code. You will find the appropriate gel file for K2H board at path: C:\ti\mcsdk_bios_3_00_03_15\tools\program_evm\gel\xtcievmk2x.gel      , once you install MCSDK_3_00_0315

Please have a look at the screenshot where in, in the CCS-->*.cxml file --> Advanced-->C66xx_0 --> initilaization script --> path to gel file -- ("..\ti\mcsdk_bios_3_00_03_15\tools\program_evm\gel\xtcievmk2x.gel")

Please note that the gel file is completely run and make the DSP core ready to load the program as a next step.

Hope this helps!.

Regards,

Shankari

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Hi Shankari,

Thanks for the timely response. You and your fellow TI engineers have helped me a lot.

I don't have any issues connecting to the target and all the cores. Your suggestion to use TCI6636K2H as the device target handled that. I have questions about how to assign the stack/heap, text, data sections into appropriate memory addresses. I am using the bare metal mode.

Currently I am using a linker command file for C6678, but would like to have a tailored version for 66AK2H14.

-Robby

Here is the linker command file I am using. I checked the L1/L2/L3 SRAM in the datasheet, but not the rest. Do the addresses and length for SHRAM and DDR also match those on 66AK2H14?

MEMORY
{
LOCAL_L2_SRAM: o = 0x00800000 l = 0x00080000 /* 512kB LOCAL L2/SRAM */
LOCAL_L1P_SRAM: o = 0x00E00000 l = 0x00008000 /* 32kB LOCAL L1P/SRAM */
LOCAL_L1D_SRAM: o = 0x00F00000 l = 0x00008000 /* 32kB LOCAL L1D/SRAM */
SHRAM: o = 0x0C000000 l = 0x00400000 /* 4MB Multicore shared Memmory */

EMIF16_CS2: o = 0x70000000 l = 0x04000000 /* 64MB EMIF16 CS2 Data Memory */
EMIF16_CS3: o = 0x74000000 l = 0x04000000 /* 64MB EMIF16 CS3 Data Memory */
EMIF16_CS4: o = 0x78000000 l = 0x04000000 /* 64MB EMIF16 CS4 Data Memory */
EMIF16_CS5: o = 0x7C000000 l = 0x04000000 /* 64MB EMIF16 CS5 Data Memory */

DDR3: o = 0x80000000 l = 0x80000000 /* 2GB CE0 and CE1 external DDR3 SDRAM */
}

SECTIONS
{
.text > SHRAM
.stack > SHRAM
.bss > SHRAM
.cio > SHRAM
.const > SHRAM
.data > SHRAM
.switch > SHRAM
.sysmem > SHRAM
.far > SHRAM
.args > SHRAM
.ppinfo > SHRAM
.ppdata > SHRAM

/* COFF sections */
.pinit > SHRAM
.cinit > SHRAM

/* EABI sections */
.binit > SHRAM
.init_array > SHRAM
.neardata > SHRAM
.fardata > SHRAM
.rodata > SHRAM
.c6xabi.exidx > SHRAM
.c6xabi.extab > SHRAM
}