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Does the C6657 RBL support multi-master I2C

I am wanting to boot multiple C6657 chips from the same EEPROM. Does the C6657 RBL support multi-master I2C during boot where the DSP is the I2C Master?

There is already an answer provided for the C6672 at http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/t/145611. It is stated that the C6672 does support multi-master I2C at boot time. I am making sure this applies to the C6657 as well.

  • Hi Iain,
    Please refer Boot loader user guide for keystone devices and device specific data manual for multi-master i2c support.

  • I have read the following relevant documentation on this subject:
    - Keystone DSP Bootloader documentation (SPRUGY5C, July 2013 (latest version))
    - C6657 Data Manual (SPRS814A, August 2012(latest version))
    - C6657 Silicon Errata (SPRZ381A, June 2013 (latest version))
    - Keystone I2C Peripheral Manual (SPRUGV3, August 2011 (latest version))

    I understand that the DSP is capable of multi-master I2C, in which the I2C peripheral reports to the user (either by interrupt or by the user polling the ICSTR register) when it has lost arbitration.

    In none of the above manuals does it detail whether the C6657 RBL is coded to support multiple masters on the I2C bus while the DSP I2C Master is trying to load the DSP image from EEPROM.
  • Yes, I have confirmed with the ROM author that multi-master I2C boot is supported on C6657 devices as well.

    Regards,
    Rahul