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PCIe Clock Frequency (C6657)

Ian Miller1
Prodigy 30 points

The Hardware Design Guide for KeyStone I Devices on page 31 seems to indicate that the PCIECLKp pins cannot be clocked at 125MHz.  However page 32 (2-6) of KeyStone Architecture Peripheral Component Interconnect Express (PCIe) User Guide shows a 20x multiplier is possible in the PCIe PLL which would result in 2.5GHz from 125MHz which is the target clock rate.  Can someone clarify whether a 125MHz oscillator will work as the PCIe clock?

  • 0
    TI__Guru* 81335 points
    Hi Ian Miller,
    Welcome to the TI E2E forum. I hope you will find many good answers here and in the TI.com documents and in the TI Wiki Pages (for processor issues). Be sure to search those for helpful information and to browse for the questions others may have asked on similar topics (e2e.ti.com).
    Please refer all the links below my signature. We will get back to you on the above query.
    Thank you.
  • 0
    TI__Mastermind 43660 points
    Hello Ian,

    The internal PLL of PCIe module is designed in such a way that it supports only 100, 156.25, 250, 312.5 MHZ only. Though the multiplier supports 20x setting, you cannot use 125 MHz as PCIe reference clock.

    Regards,
    Senthil