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DDR3 EMIF/Timing Configuration for Custom Board (Based on BBB)

I am trying to bring up a custom board designed based on the BeagleBoneBlack.

The board uses the same core components as the BBB including the PMIC, the exact same parts for the CPU and the DDR ram (Micron).

I am able to get the Beaglebone uboot image booted up., but the Board keeps rebooting randomly from Uboot, and this does not seem to be caused by the PMIC.

We are suspecting the DDR timing configuration could be potential issue. We tried to follow the link below

http://processors.wiki.ti.com/index.php/Sitara_Linux_Training:_Tuning_the_DDR3_Timings_on_BeagleBoneBlack#Configuring_the_Target_Configuration_File 

But this link talks about needing a JTAG emulator to fine tune the timing parameters and I do not have a JTAG with me at the moment.

Is there some other way I can get the appropriate EMIF/Timing configuration values without needing the JTAG and using just the excel sheets.