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Additional using EDMA for copy time stamp from eCAP HW register in RAM

Other Parts Discussed in Thread: AM3354, SYSBIOS

Documentation on a AM3354 does not forbid to do it, if the  HW register addresses  aligned. Can there be any problems with this use?

  • Could please describe what you want to achieve with more details?

  • Hi Biser!

    I want to receive packets for the UART. Frequency of receiving packets 5ms. I need to know when receiving of each byte in the packet up to tens of nanoseconds.
    For this I set up a UART with EDMA to receive a every byte, and different EDMA channel chained transmission (Timer HVREG -> RAM) after each byte.

    I also want to transmit packets to UART. Frequency of packet transmission 5ms asynchronously from receiving packets. I also need to know the end time of packet transmission up to tens of nanoseconds. For this I set up a UART with EDMA as analogous to the receive, but no transmission a every byte, and through hw fifo buffer.

    When I begin, and receive and transmit at the same time, the bytes transmitted corrupted. Begins transmitting 0xFF instead of normal characters.

    Best regards? Vladimir

  • What software is this? This forum supports only the TI distributed Linux EZSDK.

  • My software is based on its  StarterWare_02_0 + drivers programmed by me + sysbios kernel. My driver does not use the operating system objects.

    And what about the silicon, hardware?

    After all, in the header forum says: "This forum supports technical questions related to silicon, hardware, Linux for the Sitara Processors ..."

    Best regards? Vladimir