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AM335x GPMC Pinmux

Ryuuichi machida
Guru 13425 points

Hi Expert,

- 1 -

Let me confirm about following thread.

http://e2e.ti.com/support/arm/sitara_arm/f/791/t/195352

* Here is description which is described in above thread.

The problem is that the signals gpmc_a[11:0] have two possible functions linked to the GPMC peripheral:

mux value 0: gpmc_a[11:0]

mux value 4: gpmc_a[27:a16]

The TRM Table 7-5, center column, says I want to use pins gpmc_a[11:1] as a27:a17 for a 16-bit multiplexed device. Using that table, i set the mux settings to 4. Because the names of the signals at mux value 4 match the names given in Table 7-5. 

HOWEVER, that is not how the system should be configured. THAT is the confusing part. 

The TRM does NOT contain information on the correct IOMUX setting that should be used. 

I understood what you discussed as shown below.

* Address line and Data line should be change as shown below.

If my understanding is not correct, please correct me.

Best Regards,

Machida

  • 0
    TI__Guru**** 393215 points

    Hi Machida-san,

    I do not understand the connections in your picture. For example GPMC_A0 is not used in 16-bit A/D mux mode. Could you please describe in more detail?

  • 0 in reply to Biser Gatchev-XID
    Guru 13425 points

    Biser-san,

    Thank you for your reply.

    To begin w/, I mistook connection b/w AM335x and external device.

    Please refer to following figure instead of previous one.

    What I want you to confirm is  that

    1. When user use 16-bit address/data multiplexed memory, is connection b/w AM335x and extenal device in above figure correct or not ?

    2. When user use 16-bit address/data multiplexed memory, should user set pinmux to muxmode 0 not muxmode 4 ?

    Best Regards,

    Machida

  • 0 in reply to Ryuuichi machida
    TI__Guru**** 393215 points

    Ryuuichi machida said:
    1. When user use 16-bit address/data multiplexed memory, is connection b/w AM335x and extenal device in above figure correct or not ?

    Yes, these are the correct connections for GPMC_A[11:1]  pins. For GPMC_AD[15:0] pins it depends whether the external device latches the address internally. If this is not possible an external latch should be used for latching the address upon GPMC_nADV_ALE signal.

    Ryuuichi machida said:
    2. When user use 16-bit address/data multiplexed memory, should user set pinmux to muxmode 0 not muxmode 4 ?

    Mode 4 should be used for GPMC_A[11:1]  pins. For GPMC_AD[15:0] pins Mode 0 should be used.

  • 0 in reply to Biser Gatchev-XID
    Guru 13425 points
    Biser-san,

    >Mode 4 should be used for GPMC_A[11:1] pins. For GPMC_AD[15:0] pins Mode 0 should be used.
    Feedback from customer, it seems that GPMC is not work fine when mode4 is used for GPMC address pins.
    Could you please re-confirm ?

    Best Regards,
    Machida
  • 0 in reply to Ryuuichi machida
    TI__Guru**** 393215 points

    Ryuuichi machida said:
    it seems that GPMC is not work fine when mode4 is used for GPMC address pins

    This is not very helpful. I cannot comment without knowing exact schematics, software used, settings, etc.

  • 0 in reply to Biser Gatchev-XID
    Guru 13425 points
    Biser-san,

    * it seems that GPMC is not work fine when mode4 is used for GPMC address pins

    Sorry for poor explanation, here is detail about mentioned above.

    * To begin w/, they set mode4 to GPMC_A[11:1] pins. However, it seemed that GPMC was not work fine.
    After that, they set mode0 to GPMC_A[10:1] pins and set mode4 to GPMC_A[11] pin. In this case, they observed that GPMC worked fine.
    (No schematic change, only change pinmux on software)

    However, there is no description about this setting in TRM and no reference board which is used address/data multiplexed memory.
    So, to verify this result, I want you to re-confirm about following sentence. (This is verification from perspective of pinmux.)

    >Mode 4 should be used for GPMC_A[11:1] pins. For GPMC_AD[15:0] pins Mode 0 should be used.

    Best Regards,
    Machida
  • 0 in reply to Ryuuichi machida
    TI__Guru**** 393215 points

    I also do not have a board on which to check this, but they should keep the setting that works for them.