This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Need device tree for 8GB Nand using GPMC cs0 pin?

Hi,


I want to interface 8GB nand flash using GPMC  with CS0.

Can any body provide me help for designing 8GB nand flash device tree?

I have confusion that GPMC can have maximum 512MB address space. So that how can I access 8GB nand flash using CS0?

In kernel, They have only provided  sample nand flash size only  512MB.

Can anyone help me to design device tree for 8GB nand flash?


Thanks in advanced

-

Dhvanil

  • Hi Dhvanil,

    NAND flash is a block device, something like SD cards. It's not memory mapped. Instead all commands/addresses/data are transferred through the 8 or 16 bit data interface. The device tree entry that's provided should work for your NAND too, maybe some small modifications would be needed.

  • Thanks Biser,

    Is this GPMC device tree work with 8GB nand flash?

    Below is reference device tree file for kernel tree. andI have some doubts,

    1 )In this case the "ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */ " is set size 256 Mbytes and also note that all partition size is also 256 Mbytes same as CS0 size. In my 8GB Nand How can I define ranges for nand flash because I want to support my 8GB nand.

    2) Can you provide me reference device tree for 8GB nand? 

    &gpmc {

    status = "okay";

    pinctrl-names = "default", "sleep";

    pinctrl-0 = <&nandflash_pins_default>;

    ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */

    nand@0,0 {

    reg = <0 0 0>; /* CS0, offset 0 */

    ti,nand-ecc-opt = "bch8";

    ti,elm-id = <&elm>;

    nand-bus-width = <8>;

    gpmc,device-width = <1>;

    gpmc,sync-clk-ps = <0>;

    gpmc,cs-on-ns = <0>;

    /* MTD partition table */

    /* All SPL-* partitions are sized to minimal length

    * which can be independently programmable. For

    * NAND flash this is equal to size of erase-block */

    #address-cells = <1>;

    #size-cells = <1>;

    partition@0 {

    label = "NAND.SPL";

    reg = <0x00000000 0x000020000>;

    };

    partition@1 {

    label = "NAND.SPL.backup1";

    reg = <0x00020000 0x00020000>;

    };

    partition@2 {

    label = "NAND.SPL.backup2";

    reg = <0x00040000 0x00020000>;

    };

    partition@3 {

    label = "NAND.SPL.backup3";

    reg = <0x00060000 0x00020000>;

    };

    partition@4 {


    label = "NAND.u-boot-spl-os";


    reg = <0x00080000 0x00040000>;


    };


    partition@5 {


    label = "NAND.u-boot";


    reg = <0x000C0000 0x00100000>;


    };


    partition@6 {


    label = "NAND.u-boot-env";


    reg = <0x001C0000 0x00020000>;


    };


    partition@7 {


    label = "NAND.u-boot-env.backup1";


    reg = <0x001E0000 0x00020000>;


    };


    partition@8 {


    label = "NAND.kernel";


    reg = <0x00200000 0x00800000>;


    };

    partition@9 {

    label = "NAND.file-system";

    reg = <0x00A00000 0x0F600000>;

    };

    };

    };

    Thanks

    Dhvanil Patel

  • Dhvanil Patel,


    please understand that the NAND flash is NOT memory mapped.

    The 256MB address range has NOTHING to do with the capacity of the NAND flash.

    regards

    Wolfgang