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GPMC_CONFIG misses LIMITEDADDRESS bit

Hi.

On new OMAP-based SoCs (like OMAP5 and DRA74x) there is no LIMITEDADDRESS bit in GPMC_CONFIG register. This bit marked as RESERVED now. But GPMC_REVISION for those SoCs has the same value (0x60) as for OMAP4. So OMAP5-based and OMAP4-based SoCs GPMC revision is 6.0.

The question is next: am I actually able to use LIMITEDADDRESS bit on DRA74x (despite it's description is missing in TRM)? If no -- then why GPMC on DRA74x has the same revision as on OMAP4?

  • Hello Semen,

    The sentence below is only actual for OMAP5 and OMAP4 devices but it is not actual for DRA7xx devices.

    "When the GPMC_CONFIG[1] LIMITEDADDRESS bit is set to 1, A26–A11 are not modified during an external memory access. This limits the memory address space to 2KiB, regardless of the memory size."

    Bit GPMC_CONFIG[1] LIMITEDADDRESS is put in RESERVED in Register table. This is not applicable, as there is no limitation for 2KiB address range for DRA7xx implementation.

    Best regards,

    Yanko

  • Yanko,

    Thanks for you answer! You say that there is no limitation for 2KiB address range for DRA7xx implementation. But DRA74x TRM saying that it's the case. Am I understand correctly that it's mistake in DRA74x TRM?

    Thanks!

  • Hello Semen,

    Yes, there is typo errors in DRA74x TRM. These errors will be removed in next TRM version.

    Best regards,
    Yanko
  • Yanko,

    Thanks a lot for all your clarifications! The last question: how come that all OMAP4, OMAP5 and DRA7XX have the same value in GPMC_REVISION register, but they obviously have different GPMC IP-cores? It's kinda sad, because one can't use GPMC revision (in GPMC driver code, for instance) to figure out if he can or cannot modify LIMITEDADDRESS bit. Using your explanations I managed to create such patch: lkml.iu.edu/.../00154.html , but it doesn't look good because I couldn't use revision number to tell if I have LIMITEDADDRESS bit.
  • Hello Semen,

    #Q: how come that all OMAP4, OMAP5 and DRA7XX have the same value in GPMC_REVISION register, but they obviously have different GPMC IP-cores?

    - This different is due to differences in GPMC IP integration in DRA7xx. 

    It had better to check Product ID instead GPMC revision in your patch. For more information see in section 1.5 DRA75x/DRA74x Device Identification in TRM.

    See Table 1-1. Device Identification Register Fields.

    Best regards,

    Yanko