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Using MSMCSRAM with MPAX

ikhyun kim
Prodigy 70 points
Other Parts Discussed in Thread: TCI6638K2K

Hi my name is IK who work in DSP engeneering CO.

I have question about using MSMCSRAM with non-cacheable.

I using TCI6638K2K DSP and will using multi core.

I should using MSMCSRAM which can connect each cores.

I've made simple test code which ref as MSMC doc and MPAX doc.

The code run as

1.XMC  MSMC : 0x0c000000 -> 0x24000000 (reserved range)

2. make an array abc[100] with value 0~10

3. check abc[] in task

4. overwirte abc[] in task

5. if task itters bigger then 10 core 1 will wake up (with core_wake_up make as 1)

 

I check the addresses 0x24000000 and the value was 0,1,2,3,4,5,6,7,8,9 when I finished core 0's job(core1 never wake up... so sad)

Why can't I write in extentioned virturel memory which relevant MSMCSRAM

After write abc 0x24000000 never change.

 

attach file is my code and plz let me know what was wrong

 

MSMC_test.zip

 

 

  • 0
    TI__Mastermind 30825 points

    IK,

    If I read your code correctly, it will only enter the following code once, because core_wake_up is set to 0 in main, and set to 1 in core_wk(); and never reset to 0 and thus will never re-enter this portion of the task code.

    if(!core_wake_up)
    {
    i++;

    if(i>10)
    {
    asm(" nop");
    asm(" nop");
    asm(" nop");
    asm(" nop");
    asm(" nop");
    i=0;
    core_wk();
    asm(" nop");
    asm(" nop");
    asm(" nop");
    asm(" nop");
    asm(" nop");
    //MSMC_test();
    //Cache_wb(&core_wake_up,16,0,0);
    }


    //Cache_wb(&abc,1000,0,0);
    System_printf("[core0]abc[%d] = %d\n",i,abc[i]);
    abc[i] = 10-i;
    }

    And while abc[0] would be set to 10 (i hits 11 before entering the nested if statement, but was reset to 0) it's only after the the System_printf had occurred, so the system_printf() would have given the results of the old value in abc[0], which is 0, not the one that's written after.

    Also, I'm not sure how this was supposed to actually have 'woke' corepac 1.  

    But then the if statement falls through and you had an abc[i] = i; which would put this back to 0.  It's currently commented out, but I'm wondering if this was what the code was when you had viewed the results.

    I'd suggest stepping back from this routine, to simply use the MPAX to change the location (which looks like you figured out you needed to do as MSMCSRAM base address MAR cannot be made non-cacheable.)  Disable the MAR for that location and then attempt to read and write from that address, use the emulator to verify the value is in the address from both corepac's view's.

    Best Regards,

    Chad