OMAP-L137 ROM bootloader: time margin before reading boot media

Hi

When booting the OMAP-L137, I understand the boot pins are latched by the D800K001 Bootloader on rising edge of reset. Tha OMAP-L137 datasheet specifies a 20ns minimum margin on each side of rising reset where the boot pins must be defined.

Now, I use a bus switch to connect the boot pins to a mode select DIP-switch during this phase (switches the pins between boot strap and SPI bus), BUT, in cases where the very same pins are used for boot media (SPI boots for instance) there will obviously be a MAXIMUM delay for me to note - the time where the bus switch must be in a state connecting boot pins to SPI peripherals, the time where the bootloader initiates the SPI bus.

Since I use a delayed reset signal to operate the bus switch, i need to pin down a ballpark number for this maximum delay.

How can I define this maximum delay, are there any reference as to the number of cycles before the D800K001 bootloader selects the SPI /CS line and initiates data transfer?

- Kjetil