Hello Biser,
In the Starter kit the data lines to DDR3 SDRAM interface i.e DQ0-DQ15 has been shuffled. Is this done to achieve routing and signal integrity.
Regards,
Mamatha
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Hello Biser,
In the Starter kit the data lines to DDR3 SDRAM interface i.e DQ0-DQ15 has been shuffled. Is this done to achieve routing and signal integrity.
Regards,
Mamatha
Yes, but this is only permitted within byte lanes. DQ0-DQ7 can be shuffled, and also DQ8-DQ15, but not across the bytes.