Other Parts Discussed in Thread: SYSBIOS, TMS320C6678
I've created a custom platform with the wizard (CCSv6) to partition MSMCSRAM. Now the linker is complaining that the L1D and L1P caches are specified with len=0. I've compared my platform with the TI supplied evm66678 in the wizard, and the caches are specified the same, both drop down boxes set to 32k (all L1 is cache). But the generated linker command file for my platform has memory defined as
MEMORY
{
MSMCSRAM_I (RWX) : org = 0xc000000, len = 0x140000
L1DSRAM (RW) : org = 0xf00000, len = 0x0
L1PSRAM (RWX) : org = 0xe00000, len = 0x0
L2SRAM (RWX) : org = 0x800000, len = 0x80000
MSMCSRAM_C (RWX) : org = 0xc140000, len = 0x200000
MSMCSRAM_O (RWX) : org = 0xc340000, len = 0xc0000
DDR3 (RWX) : org = 0x80000000, len = 0x20000000
}
but with the ti platform, the 2 L1 lines are not there. Why did they show up and how do I get them out? I can't see anything different I can do in the wizard.
Thanks for any help. Mike