Spread Spectrum Clocking in Keystone PCIe module

Thomas Yang55737

Hi Experts

According to PCIe UG, it supports Spread Spectrum Clocking feature to reduce EMI , I knew that user shoud configure common clock in LINK_STAT_CTRL regsiter, is it right? If yes, does user need to configure any other registers to support this feature

regards,

Thomas

over 11 years ago

0 Senthilkumar Srinivasan over 11 years ago

TI__Mastermind 43660 points

Hello Thomas,

For spread spectrum clocking feature, you need to configure common clock in LINK_STAT_CTRL register. In addition to that, you also need to set the RX_CDR field in SERDES_CFG0 register for SSC support.

Regards,
Senthil

0 Thomas Yang55737 over 11 years ago in reply to Senthilkumar Srinivasan

TI__Expert 5706 points

Hi Senthil
Thanks for reply. Yes, below 2 registers needs to be configured to support spread spectrum clocking features.
As we want to close SSC to reduce total jitter to match PCIe spec requirement, how to do this(close SSC) in C665x PCIe module?
Best regardsThomas

0 Senthilkumar Srinivasan over 11 years ago in reply to Thomas Yang55737

TI__Mastermind 43660 points

Hello Thomas,

As we want to close SSC to reduce total jitter to match PCIe spec requirement, how to do this(close SSC) in C665x PCIe module?

Your question is not clear to me. Could you please elaborate your requirement ?

Regards,

Senthil

0 Thomas Yang55737 over 11 years ago in reply to Senthilkumar Srinivasan

TI__Expert 5706 points

Hi Senthil

OK, Can user close SSC feature in Keystone PCIe IP? If yes, how?

Best regards

Thomas

0 Senthilkumar Srinivasan over 11 years ago in reply to Thomas Yang55737

TI__Mastermind 43660 points

Hello Thomas,

Do you want to disable SSC feature ? If yes, you can select the register option which does not involve SSC. Seems there is no specific register to disable this.

Regards,
Senthil

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Spread Spectrum Clocking in Keystone PCIe module