Hello support team,
when I access data unaligned on my AM3359, the CPU calls the abort handler, even when the A bit in the CP15 control register is off (C1 = 0x00C50878). The TRM says, that unaligned access is supported and when the A bit is 0, no exception is thrown.
c1, Control Register
[1] A bit Banked Enables strict alignment of data to detect alignment faults in data accesses:
0 = strict alignment fault checking disabled, reset value
1 = strict alignment fault checking enabled.
A3.2.1 Unaligned data access
An ARMv7 implementation must support unaligned data accesses. The SCTLR.U bit is RAO to indicate this support. The SCTLR.A bit, the strict alignment bit, controls whether strict alignment is required. The checking of load and store alignment depends on the value of this bit.
(I am using the CCS5.5 with the Beaglebone black. I know that the switch --unaligned_access=off prevents unaligned access.)
So I am confused now. Why is the abort handler called when the A bit is 0?
Thanks in advance,
Stephan
