Question about memory map

Oleg Borovikov

Other Parts Discussed in Thread: TMS320C6678, SYSBIOS

Hi All,

I have the following representation for establishment of API for DSP
1. I create the project in CCSv5 and to upload it to DSP use my emulator SEED-XDS560v2
2.This API is not by work API to DSP because it requires initialization DDR3 memory and PLL using GEL file
3.GEL file is not part my API and loaded to DSP only by emulator after connect with any core
4.I can not create API if I use memory map to RTSC with "Program.sectMap[.text] = "DDR3" " don't use GEL file
I can create API for DSP and create memory map using RTSC if I use only Shared Memory - "Program.setMap[.text] = "MSMCSRAM" " and I can init DDR3 inside my API. (I create this example for QMSS)
I have questions - what restriction am I have in this case - how I can create memory map type as "Program.sectMap[.text] = "DDR3" " if I not used GEL file
Or I misunderstood. the process of creating chipboard applications?
PS. I believe that I should have a binary boot file that I write into flush memory for automatically download

Best regards,

Oleg

over 9 years ago

0 Oleg Borovikov over 9 years ago

Expert 1280 points

I looked examples from mcsdk_2_01_02_06/tools/boot_loader/ibl...

As I can understand it uses own ibl gel file for initialization PLL and DDR3.

Should I create similar gel file for boards of my clients?

Is this the only method to create boot file?

0 Raja over 9 years ago in reply to Oleg Borovikov

TI__Guru* 81335 points

Hi Oleg,
If you are using the emulator(No boot/Debug mode) to load the DSP cores then you shall use gel files to init the DDR and PLL.

If the NAND boot mode is selected then IBL(from i2c) shall be used to init the DDR & PLL. The IBL will download the user application from NAND and execute it.

1. What do you mean my API here?
2. What is the target DSP part number and bootmode?

Please refer MCSDK user user guide for more information about bootloader and utilities.
processors.wiki.ti.com/.../BIOS_MCSDK_2.0_User_Guide

Thank you.

0 Oleg Borovikov over 9 years ago in reply to Raja

Expert 1280 points

Hi Rajasekaran,
I wrote small API to customer board with DSP TMS320C6678. It is not EVM. I used next .cfg file
var Memory = xdc.useModule('xdc.runtime.Memory');

var HeapMem = xdc.useModule('ti.sysbios.heaps.HeapMem');

var Csl = xdc.loadPackage('ti.csl');
var Cppi = xdc.loadPackage('ti.drv.cppi');
var Qmss = xdc.loadPackage('ti.drv.qmss');
var Pa = xdc.loadPackage('ti.drv.pa');

var heapMemParams1 = new HeapMem.Params();
heapMemParams1.size = 8192 * 30;
heapMemParams1.sectionName = "systemHeap";
Program.global.heap0 = HeapMem.create(heapMemParams1);

/* Memory map */
Memory.defaultHeapInstance = Program.global.heap0;
Program.sectMap["systemHeap"] = "MSMCSRAM";
Program.sectMap[".text"] = "L2SRAM";
Program.sectMap[".const"] = "L2SRAM";
Program.sectMap[".qmss"] = "MSMCSRAM";
Program.sectMap[".cppi"] = "MSMCSRAM";

Program.sectMap[".sharedDDR"] = "MSMCSRAM";
Program.sectMap[".cppiMemTX"] = "MSMCSRAM";
Program.sectMap[".cppiMemRX"] = "MSMCSRAM";

as I read in the BIOS MCSDK 2.0 User Guide - "everything is running from shared memory (MSMCRAM) - so no GEL file is needed" -
I don't use GEL file.
I wrote function initialize DDR3. I use as example evmc6678l.gel and ti/pdk_C6678_1_1_2_6/packages/platform/evmc6678l/platform_lib/src/evm6678.c
and my main function is
#include "small_stable.h"
#include "dsp_qmss_init.h"
#include "dsp_init_pll.h"
int main(void) {
Global_Default_Setup_Silent();
int i = 2;
int j = 2;
int m = 100;

if (Init_Qmss() != 0)
return -1;
if (Init_Cppi() != 0)
return -1;
m = i+j;
m+= j;
m = m * i;
m-= i;
m = NC_SystemOpen(NC_PRIORITY_LOW, NC_OPMODE_INTERRUPT);
if (m)
return -1;
m += 2;

}
where
void Global_Default_Setup_Silent(void) {
int count;

/* DDR PLL settings for 1333 MHz */
unsigned int PLLM_DDR = 19;
unsigned int PLLD_DDR = 0;

/* PASS PLL settings for 1050 MHz */
unsigned int PLLM_PASS = 20;
unsigned int PLLD_PASS = 0;
int status;
Set_DSP_Cache();
Uint32 coreNum = CSL_chipReadReg(CSL_CHIP_DNUM);
if (!coreNum) {
for (count = 0; count < PLL_REINIT_MAX_COUNT; count++) {
// Setup Pll1 DSP @ TARGET_FREQ
status = Init_PLL(PLL1_M, PLL1_D);
if (status == -1)
return;
if (!count) {
// Setup all Power Domains on
_setup_psc();
}
// Setup Pll3 pass clk @ 1050 MHz
Init_Pll3(PLLM_PASS, PLLD_PASS);

// Setup Pll2 DDR3 PLL @ 667 MHz
Init_Pll2(PLLM_DDR, PLLD_DDR);
xmc_setup();
ddr3_setup_auto_lvl_1333();
if(ddr3_memory_test() == 0) {
break;
}
}
if (count == PLL_REINIT_MAX_COUNT)
return;
configSGMIISerdes();
EnableEDC_OneforAll();
setCpSwConfig();
}
}

Connect with targed - core 0

Load program

After test

I have question - are there restrictions with use this path?

Best reagards,

Oleg

0 Oleg Borovikov over 9 years ago in reply to Oleg Borovikov

Expert 1280 points

I had did initialize of DDR3 into my project; I use this implementation. It all successfully. At now I have identical projects for debug via emulator and boot. At least for now . . .
Thank
Oleg

0 Raja over 9 years ago in reply to Oleg Borovikov

TI__Guru* 81335 points

Hi Oleg,
Glad that your issue is resolved however I did not understand the fix posted above.

Thank you for the update.

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Question about memory map