How to set the internel clock for mcasp on our ti8148_evm board

Hi,

Moving your post to right forum to be better answered.

Thanks & regards,
Sivaraj K

Hi ,

The forum should be right.The cpu on our board is dm8148.

BR

Bob

Hi Bob,

Now I have moved to correct forum but earlier, it was in OMAPL13x device forum.

Hope you will get response soon from experts over this forum .

Thanks & regards,
Sivaraj K

Thank you.

Bob,

bob lee said:

1) MCA[0] (schematic circuit diagram) is mcasp.1 (kernel)? Is it right?

No, MCA[0] in schematic corresponds to McASP0 in datasheet and McASP0 in linux kernel: TI81XX_ASP0_BASE, davinci-mcasp.0, ti81xx_mcasp_device.id=0

Only clock signals (described in clock814x_data.c file) are mapped with offset: McASP0 uses mcasp1_ick, mcasp1_fck, mcasp1_ahx_ck, mcasp1_ahr_ck

bob lee said:

2)The chip tlv320aic3x offers the clock for pcm(External),but I want the clock is from cpu(Internal),so I want to know how to set ?

By default DM814x McASP2 is slave, AIC3x codec is master, that is why AIC3x codec supply McASP2 with clock (codec driving the bit clock and the frame sync). From what I understand you need DM814x McASP0 to be master (not slave) thus generate the clock signal. See DM814x TRM, section 16.2.2 Clock and Frame Sync Generators

The McASP clock generators are able to produce two independent clock zones: transmit and receive clock zones. The serial clock generators may be programmed independently for the transmit section and the receive section, and may be completely asynchronous to each other. The serial clock (clock at the bit
rate) may be sourced:
• Internally - by passing through two clock dividers off the internal clock source (AUXCLK).
• Externally - directly from ACLKR/X pin, which are configured as inputs. In this case, the Rx/Tx high-speed clock logic is bypassed for the XCLK/RCLK generation.
• Mixed - an external high-frequency clock is input to the McASP on either the AHCLKX or AHCLKR pins, and divided down to produce the bit rate clock.

In the internal/mixed cases, the bit rate clock is generated internally and should be driven out on the ACLKX (for transmit) or ACLKR (for receive) pins. In the internal case, an internally-generated high-frequency clock may be driven out onto the AHCLKX or AHCLKR pins to serve as a reference clock for other components in the system.

16.2.2.1 Transmit Clock

16.2.2.2 Receive Clock

16.2.10.1.1 Clocks

16.2.10.2 Transmit/Receive Section Initialization

bob lee said:

3)The chip tlv320aic3x is connected to mcasp.2?

Yes

bob lee said:

But our chip is connected to MCA[0],so would you tell me how modify the code ?

The ALSA SoC Audio driver can be modified to support different McASP instance. See the Audio.ppt presentation (attached in the below wiki page), section Use different McASP instance

Useful info also in the below wiki page:

BR
Pavel

See also the below e2e threads:
e2e.ti.com/.../297000
e2e.ti.com/.../149316

BR
Pavel

Hi Pavel,

Thank you for your post.

I have set McASP0 instead of McASP2 in kernel.

But I failed to set the clock for McASP0 from AUXOSC(24.576Mhz) though you have told me how to set it for McASP2 before.

So need your help again .

BR

Bob

Bob,

bob lee said:

But I failed to set the clock for McASP0 from AUXOSC(24.576Mhz) though you have told me how to set it for McASP2 before.

Please provide more details.

BR
Pavel

Hi Pavel,

As you know,the codec tlv320 device is connected to McASP2,and I have set it to McASP0.

And I want oscillator outside provides the clock 24.576MHz.But there are no clock on pins bclk and fsk after setting some related register.

Maybe somewhere is wrong.

So need your hlep urgent.

BR

Bob

Bob,

bob lee said:

And I want oscillator outside provides the clock 24.576MHz.

In DM814x TI EVM, the AUX oscillator is 22.579MHz. Have you change it to 24.576MHz in your custom board?

Do you want the below clock path?

AUX oscillator -> PLL_AUDIO -> PRCM -> McASP0 aux_clk -> McASP0 clock pins output

BR
Pavel

Hi Pavel,

In DM814x TI EVM, the AUX oscillator is 22.579MHz. Have you change it to 24.576MHz in your custom board?

Yes,you're right.

Do you want the below clock path?

AUX oscillator -> PLL_AUDIO -> PRCM -> McASP0 aux_clk -> McASP0 clock pins output

Yes,you're right.

BR

Bob

Bob,

I think we have already discussed all this in the below e2e thread:

e2e.ti.com/.../197142

BR
Pavel

Hi Pavel,

Yes,you're right.

But this time I failed to set the clock.There are no clock at MCA[0]_ACLKX and MCA[0]_AFSX pins.

The oscillator is connected to pin AUXOSC_MXI/AUX_CLKIN,do I need to set pinmux?

Bob