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Clocks for echo cancellation

Mahw
Prodigy 30 points

For video conferencing applications, the DM365's voice codec may be used to microphone input. Such applications may also use the McBSP interface to move audio to an external transceiver such as an HDMI receiver. Video conferencing applications require echo cancellation. Echo cancellation requires clocks to be locked. Echo cancellation also tends to prefer or even require that the audio sampling frequency of the microphone and the speaker be integral multiples of each other.

The DM365's voice codec can sample at ~8 kHz and ~16kHz. This is done by using PLL2 as follows:

f_PLL2 = 24 MHz oscillator * 99 / 4 = 594 MHz

fs_8kHz_mic = f_PLL2 / 29 / 5 / 512 = 8001.0775… Hz

fs_16kHz_mic = f_PLL2 / 29 / 5 / 256 = 16002.1551… Hz

 

The DM365's McBSP interface can be set to ~32 kHz, one of the standard HDMI audio rates as follows:

f_PLL1 = 24 MHz oscillator * 81 / 4 = 486 MHz

fs_32kHz_mcbsp_clock = f_PLL1 / 4 / 119 / 32 = 31906.5126… Hz

 

Unfortunately, the McBSP audio clock rate is neither equal to (fs_8kHz_mic x 4) nor (fs_16kHz_mic x 2). This makes echo cancellation very difficult, especially on an ARM9 processor.

The root of this problem is that the voice codec is clocked from PLL2 and the McBSP interface is clocked from PLL1. 

 

Question: Is there a way to generate 8 kHz and 16 kHz clock frequencies for the mic of the voice codec that are exactly 1/4 and 1/2 the rate of a 32 kHz audio clock used in the McBSP?

 

-- MBS

  • 0
    TI__Genius 9490 points

    If you need exactly 16Khz or 8khz it will be very difficult to obtain it without possibly sacrificing some performance by the ARM/HDVICP.  Other combinations of the PLLs divider/multiplies might allow you to find these but you will need to try them out.

    as noted in the device datasheet in section 3.3.6

    "Note 3: There are example cases where the voice codec sampling frequency is listed as 15.98 kHz or

    16.002 kHz. The difference of 0.125% or 0.0125% versus 16 kHz specification should be acceptable for

    the majority of audio applications. If the DM365 voice codec is required to operate at precisely 16 kHz

    then the functional clock can be reduced to achieve precisely that sample frequency but the ARM926 and

    HDVICP will have to run at a reduced rate resulting in lower video performance."