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How can display hdmi by digital output at DM365

Sungil Kim
Intellectual 265 points

Hello.

 

I read a number of article about digital output from thsi forum

but i can't find success digital outpuy settnig or any information

I want to below

       Digital output of DM365 (YCbCr16,720P-60)  -> External Hardware (For Example, AD9889 or TDA988x) -> HDMI  Display

I work under dvsdk_2_10_01_18 &  Linux 2.6.18_pro500(montavista)

I modify driver drivers/media/video/davinci/davinci_platform.c and logicpd_encoder.c

I add 720P-60 mode at logicpd_encoder.c (reference sprufg9)

            .standards[0] = {
                       .name = VID_ENC_STD_720P_60,
                       .std = 1,
                       .if_type = VID_ENC_IF_YCC16,
                       .interlaced = 0,
                       .xres = 1280,
                       .yres = 720,
                       .fps = {60, 1},
                       .left_margin = 300,
                       .right_margin = 70,
                       .upper_margin = 26,
                       .lower_margin = 4,
                       .hsync_len = 63,
                       .vsync_len = 5,
                       .flags = 0},

I add  my function, reference davinci_enc_set_digital_prbg function

static void davinci_enc_set_digital_ycbcr16(struct vid_enc_mode_info *mode_info)
{

    printk(KERN_ERR "%s:%s:%d Enter\n",__FILE__,__func__,__LINE__);
    enableDigitalOutput(1);

    dispc_reg_out(VENC_VIDCTL, 0x141);
    /* set VPSS clock */
    //VPSS Clock Mux Control Register
    davinci_writel(0x58, SYS_VPSS_CLKCTL); // MXI OSC

    davinci_writel(0x081141EF, DM3XX_VDAC_CONFIG);

    printk(KERN_ERR "%s:%s:%d Set Color Bar\n",__FILE__,__func__,__LINE__);
    dispc_reg_merge(VENC_VDPRO, (1<<8), (1<<8));


    /* DM365 pinmux */
    dispc_reg_out(VENC_CLKCTL, 0x11);
    davinci_cfg_reg(DM365_VOUT_HVSYNC, PINMUX_RESV);
    davinci_cfg_reg(DM365_VOUT_COUTL_EN, PINMUX_RESV);
    davinci_cfg_reg(DM365_VOUT_COUTH_EN, PINMUX_RESV);

    /* Set VIDCTL to select VCLKE = 1,
       VCLKZ =0, SYDIR = 0 (set o/p), DOMD = 0 */
    dispc_reg_merge(VENC_VIDCTL, 1 << VENC_VIDCTL_VCLKE_SHIFT,
            VENC_VIDCTL_VCLKE);
    dispc_reg_merge(VENC_VIDCTL, 0 << VENC_VIDCTL_VCLKZ_SHIFT,
            VENC_VIDCTL_VCLKZ);
    dispc_reg_merge(VENC_VIDCTL, 0 << VENC_VIDCTL_SYDIR_SHIFT,
            VENC_VIDCTL_SYDIR);
    dispc_reg_merge(VENC_VIDCTL, 0 << VENC_VIDCTL_YCDIR_SHIFT,
            VENC_VIDCTL_YCDIR);

    davinci_enc_set_display_timing(mode_info);
    dispc_reg_out(VENC_SYNCCTL,
              (VENC_SYNCCTL_SYEV |
               VENC_SYNCCTL_SYEH | VENC_SYNCCTL_HPL
               | VENC_SYNCCTL_VPL));

    /* Configure VMOD. No change in VENC bit */
    dispc_reg_out(VENC_VMOD, 0x01C3);
    dispc_reg_out(VENC_LCDOUT, 0x1);

    printk(KERN_ERR "%s:%s:%d Leave[0x%x]\n",__FILE__,__func__,__LINE__,dispc_reg_in(VENC_VMOD));
}

and i call this function at davinci_enc_priv_setmode

But i can't any signal YOUT & COUT (of couse , I type  "echo LCD > /sys/class/davinci_display/ch0/output")

what's wrong ?

 

  • 0
    Prodigy 85 points

    Hello Sungil,

    Have you fixed your issue ? I believe I'm running into the same problem, as I'm trying to get the video samples out of the Video encoder. I have setup the VPBE in master mode, and I have the correct HSYNC, VSYNC, VCLK signals, but not data :-( My video output is synchronized, but blank.

     I would appreciate any information that would help me to fix this !

    Many thnaks in advance

    Guillaume

  • 0 in reply to Guillaume ***
    Intellectual 265 points

    Hi Guillaume

    I did fixed that

    i changed some source code at kernel

    drivers/media/video/davinci/davinci_platform.c

    void davinci_enc_priv_setmode(struct vid_enc_device_mgr *mgr)

    {

     

        switch (mgr->current_mode.if_type) {

        case VID_ENC_IF_BT656:

            dispc_reg_merge(VENC_VMOD,

                    VENC_VMOD_VDMD_YCBCR8 << VENC_VMOD_VDMD_SHIFT,

                    VENC_VMOD_VDMD);

            dispc_reg_merge(VENC_YCCCTL, 1, 1);

            break;

        case VID_ENC_IF_BT1120:

            break;

        case VID_ENC_IF_YCC8:

            dispc_reg_merge(VENC_VMOD,

                    VENC_VMOD_VDMD_YCBCR8 << VENC_VMOD_VDMD_SHIFT,

                    VENC_VMOD_VDMD);

            break;

        case VID_ENC_IF_YCC16:

            dispc_reg_merge(VENC_VMOD,

                    VENC_VMOD_VDMD_YCBCR16 << VENC_VMOD_VDMD_SHIFT,

                    VENC_VMOD_VDMD);

            break;

        case VID_ENC_IF_SRGB:

            dispc_reg_merge(VENC_VMOD,

                    VENC_VMOD_VDMD_RGB8 << VENC_VMOD_VDMD_SHIFT,

                    VENC_VMOD_VDMD);

            break;

        case VID_ENC_IF_PRGB:

            dispc_reg_merge(VENC_VMOD,

                    VENC_VMOD_VDMD_RGB666 << VENC_VMOD_VDMD_SHIFT,

                    VENC_VMOD_VDMD);

            break;

        default:

            break;

        }

     

    #ifdef CONFIG_MACH_DAVINCI_DM368_TRUEN

        if(mgr->current_mode.if_type == VID_ENC_IF_YCC16)

        {

            if (strcmp(mgr->current_mode.name,VID_ENC_STD_480P_60) == 0) {

                davinci_enc_set_digital_ycbcr16(&mgr->current_mode,HDMI_480P);

            } else if (strcmp(mgr->current_mode.name, VID_ENC_STD_576P_50) == 0) {

                davinci_enc_set_digital_ycbcr16(&mgr->current_mode,HDMI_576P);

            } else if (strcmp(mgr->current_mode.name, VID_ENC_STD_720P_60) == 0) {

                davinci_enc_set_digital_ycbcr16(&mgr->current_mode,HDMI_720P_60);

            } else if (strcmp(mgr->current_mode.name, VID_ENC_STD_720P_50) == 0) {

                davinci_enc_set_digital_ycbcr16(&mgr->current_mode,HDMI_720P_50);

            } else if (strcmp(mgr->current_mode.name, VID_ENC_STD_1080I_30) == 0) {

                davinci_enc_set_digital_ycbcr16(&mgr->current_mode,HDMI_1080I_30);

            } else if (strcmp(mgr->current_mode.name, VID_ENC_STD_1080I_25) == 0) {

                davinci_enc_set_digital_ycbcr16(&mgr->current_mode,HDMI_1080I_25);

            } else

            {

                printk(KERN_ERR "%s:%s:%d> Not Support mode %s\n",__FILE__,__func__,__LINE__,mgr->current_mode.name);

            }

        }

        else if(mgr->current_mode.if_type == VID_ENC_IF_BT656 || mgr->current_mode.if_type == 0)

        {

            if (strcmp(mgr->current_mode.name, VID_ENC_STD_NTSC) == 0)

                davinci_enc_set_ntsc(&mgr->current_mode);

            if (strcmp(mgr->current_mode.name, VID_ENC_STD_PAL) == 0)

                davinci_enc_set_pal(&mgr->current_mode);

        }

        else

            printk(KERN_ERR "%s:%s:%d> Not Support mode [0x%x]\n",__FILE__,__func__,__LINE__,mgr->current_mode.if_type);
     #else 

    blabla........

     

    and added below

     

    #ifdef CONFIG_MACH_DAVINCI_DM368_TRUEN

    enum HDMI_MODE_E {

        HDMI_480I,

        HDMI_576I,

        HDMI_480P,

        HDMI_576P,

        HDMI_720P_60,

        HDMI_720P_50,

        HDMI_1080I_30,

        HDMI_1080I_25,

        HDMI_1080P_60,

        HDMI_1080P_50,

    };


    static void davinci_enc_set_digital_ycbcr16(struct vid_enc_mode_info *mode_info,int hdmi_mode)

    {

        enableDigitalOutput(1);


        /* set VPSS clock */


        dispc_reg_out(VENC_DCLKCTL, 0);

        dispc_reg_out(VENC_DCLKPTN0, 0);

        dispc_reg_out(VENC_CLKCTL, 0x10);

        davinci_cfg_reg(DM365_VOUT_COUTL_EN, PINMUX_RESV);

        davinci_cfg_reg(DM365_VOUT_COUTH_EN, PINMUX_RESV);


        {

            int i=1;

            int data;

            data = davinci_readl(0x01C40000 + 0x4*i);

            data = data & (~(1<<17));

            data = data & (~(1<<22));

            davinci_writel(data,(0x01C40000 + 0x4*i));

        }


        //davinci_cfg_reg(DM365_VOUT_HVSYNC, PINMUX_RESV);


        dispc_reg_out(VENC_VIDCTL,0);

        /* Set VIDCTL to select VCLKE = 1,

           VCLKZ =0, SYDIR = 0 (set o/p), DOMD = 0 */

        dispc_reg_merge(VENC_VIDCTL, 1 << VENC_VIDCTL_VCLKE_SHIFT,

                VENC_VIDCTL_VCLKE);

        dispc_reg_merge(VENC_VIDCTL, 0 << VENC_VIDCTL_VCLKZ_SHIFT,

                VENC_VIDCTL_VCLKZ);

        dispc_reg_merge(VENC_VIDCTL, 0 << VENC_VIDCTL_SYDIR_SHIFT,

                VENC_VIDCTL_SYDIR);

        dispc_reg_merge(VENC_VIDCTL, 0 << VENC_VIDCTL_YCDIR_SHIFT,

                VENC_VIDCTL_YCDIR);


        dispc_reg_merge(VENC_DCLKCTL,

                1 << VENC_DCLKCTL_DCKEC_SHIFT, VENC_DCLKCTL_DCKEC);


        dispc_reg_out(VENC_DCLKPTN0, 0x1);

        davinci_enc_set_display_timing(mode_info);


        switch(hdmi_mode)

        {

            case HDMI_480P:

                printk(KERN_INFO "HDMI 480P\n");

                davinci_writel(0x28, SYS_VPSS_CLKCTL);

                dispc_reg_out(VENC_VMOD, 0x0503);

                dispc_reg_out(VENC_XHINTVL,0);

                break;


            case HDMI_576P:

                printk(KERN_INFO "HDMI 576P\n");

                davinci_writel(0x28, SYS_VPSS_CLKCTL);

                dispc_reg_out(VENC_VMOD, 0x0543);

                dispc_reg_out(VENC_XHINTVL,0);

                break;


            case HDMI_720P_60:

                printk(KERN_INFO "HDMI 720P 60Hz\n");

                davinci_writel(0x28, SYS_VPSS_CLKCTL);

                dispc_reg_out(VENC_VMOD, 0x05c3);

                dispc_reg_out(VENC_XHINTVL,0);

                break;


            case HDMI_720P_50:

                printk(KERN_INFO "HDMI 720P 50Hz\n");

                davinci_writel(0x28, SYS_VPSS_CLKCTL);
                dispc_reg_out(VENC_VMOD, 0x05c3);
                dispc_reg_out(VENC_XHINTVL,330);
                break;

            case HDMI_1080I_30:
                printk(KERN_INFO "HDMI 1080P30\n");
                davinci_writel(0x28, SYS_VPSS_CLKCTL);
                dispc_reg_out(VENC_VMOD, 0x0183);
                dispc_reg_out(VENC_XHINTVL,0);
                break;

            case HDMI_1080I_25:
                printk(KERN_INFO "HDMI 1080P25\n");
                davinci_writel(0x28, SYS_VPSS_CLKCTL);
                dispc_reg_out(VENC_VMOD, 0x0183 );
                dispc_reg_out(VENC_XHINTVL,440);
                break;

            case HDMI_480I:
            case HDMI_576I:
            case HDMI_1080P_60:
            case HDMI_1080P_50:
                printk("Can't support hdmi mode[%d]\n",hdmi_mode);
                break;

            default:
                break;
        }

        dispc_reg_out(VENC_OSDCLK0, 0);
        dispc_reg_out(VENC_OSDCLK1, 1);
        dispc_reg_out(VENC_OSDHADV, 0);

        davinci_writel(mode_info->left_margin,
                (DM365_OSD_REG_BASE + OSD_BASEPX));
        davinci_writel(mode_info->upper_margin,
                (DM365_OSD_REG_BASE + OSD_BASEPY));

        dispc_reg_merge(VENC_YCCCTL, (1<<0), (1<<0)); // Embedded Syn

        //
        //dispc_reg_merge(VENC_VDPRO, (1<<8), (1<<8)); // Color Bar
        //dispc_reg_out(VENC_SYNCCTL, (VENC_SYNCCTL_SYEV | VENC_SYNCCTL_SYEH)); // External Sync
         //dispc_reg_out(VENC_LCDOUT, 0x1);
    }

    and  logicpd_encoder.c

    static struct logicpd_encoder_config logicpd_encoder_configuration = {

        .no_of_outputs = LOGICPD_ENCODER_MAX_NO_OUTPUTS,

        .output[0] = {

    #ifdef CONFIG_MACH_DAVINCI_DM368_TRUEN

            .output_name = VID_ENC_OUTPUT_LCD,

            .no_of_standard = LOGICPD_ENCODER_GRAPHICS_NUM_STD,


            .standards[0] = {

                .name =  VID_ENC_STD_480P_60,

                .std = 1,

                .if_type = VID_ENC_IF_YCC16,

                .interlaced = 0,

                .xres = 720,

                .yres = 480,

                .fps = {60, 1},

                .left_margin = 122,

                .right_margin = 16,

                .upper_margin = 36,

                .lower_margin = 9,

                .hsync_len = 62,

                .vsync_len = 6,

                .flags = 0},


            .standards[1] = {

                .name =  VID_ENC_STD_576P_50,

                .std = 1,

                .if_type = VID_ENC_IF_YCC16,

                .interlaced = 0,

                .xres = 720,

                .yres = 576,

                .fps = {50, 1},

                .left_margin = 132,

                .right_margin = 12,

                .upper_margin = 44,

                .lower_margin = 5,

                .hsync_len = 64,

                .vsync_len = 5,

                .flags = 0},


            .standards[2] = {

                .name = VID_ENC_STD_720P_60,

                .std = 1,

                .if_type = VID_ENC_IF_YCC16,

                .interlaced = 0,

                .xres = 1280,

                .yres = 720,

                .fps = {60, 1},

                .left_margin = 260,

                .right_margin = 110,

                .upper_margin = 25,

                .lower_margin = 5,

                .hsync_len = 40,

                .vsync_len = 5,

                .flags = 0},


            .standards[3] = {

                .name = VID_ENC_STD_720P_50,

                .std = 1,

                .if_type = VID_ENC_IF_YCC16,

                .interlaced = 0,

                .xres = 1280,

                .yres = 720,

                .fps = {50, 1},

                .left_margin = 260,

                .right_margin = 110,//440,

                .upper_margin = 25,

                .lower_margin = 5,

                .hsync_len = 40,

                .vsync_len = 5,

                .flags = 0},


            .standards[4] = {

                .name = VID_ENC_STD_1080I_30,

                .std = 1,
                .if_type = VID_ENC_IF_YCC16,
                .interlaced = 1,
                .xres = 1920,
                .yres = 1080,
                .fps = {30, 1},
                .left_margin = 192,
                .right_margin = 88,
                .upper_margin = 20,
                .lower_margin = 2,
                .hsync_len = 44,
                .vsync_len = 5,
                .flags = 0},

            .standards[5] = {
                .name = VID_ENC_STD_1080I_25,
                .std = 1,
                .if_type = VID_ENC_IF_YCC16,
                .interlaced = 1,
                .xres = 1920,
                .yres = 1080,
                .fps = {25, 1},
                .left_margin = 192,
                .right_margin = 88,//528,
                .upper_margin = 20,
                .lower_margin = 2,
                .hsync_len = 44,
                .vsync_len = 5,
                .flags = 0},

    #else

    Good luck

     

  • 0 in reply to Sungil Kim
    Prodigy 85 points

    Hi Sungil,

    Thanks for sharing your fix. I could check that my configuration was similar, and I analysed the differences.

    In fact, my issue was I wasn't configuring the Video and OSD windows correctly. I figured out this by enabling all windows, and I could see the scene ! I eventually turned off what wasn't required. I'm now trying to get the correct offsets in the window.

    //    dispc_reg_out(OSD_VIDWINMD, OSD_VIDWINMD_ACT0 | OSD_VIDWINMD_ACT1);
        dispc_reg_out(OSD_VIDWINMD, OSD_VIDWINMD_ACT1);
        dispc_reg_out(OSD_OSDWIN0MD, OSD_OSDWIN0MD_OACT0);
    //    dispc_reg_out(OSD_OSDWIN1MD, OSD_OSDWIN1MD_OACT1);

    I'm surprized I had to enable video frame 1 rather than 0, but I recall to see a document that was following this track.

    Regards

    Guillaume

     

  • 0 in reply to Guillaume ***
    Prodigy 70 points

    Hi guys,

    regarding bt.1120, did you use HSYNC, VSYNC, FIELD, and (LCD)_OE? or COUT[7:0], YOUT[7:0] and VCLK are enough to wire to HDMI TX which accepts bt.1120?

    I believe HVSYNCs are for BT.601 but VPBE user's guide is not clear for that.

    thanks.

  • 0 in reply to RRW
    Prodigy 70 points

    to answer my own question:

    1. only VCLK, C/YOUT are required for bt.1120.

    2. just make sure you turn on VENC.YCCCTL.R656 after setting up digital output.

    Rux Wu said:

    Hi guys,

    regarding bt.1120, did you use HSYNC, VSYNC, FIELD, and (LCD)_OE? or COUT[7:0], YOUT[7:0] and VCLK are enough to wire to HDMI TX which accepts bt.1120?

    I believe HVSYNCs are for BT.601 but VPBE user's guide is not clear for that.

    thanks.