Hi
It seems like the wait0 pin status is not updated in the GPMC module. I also found a note in the nandlib.c file about this:
// Check the Ready/Busy status
waitPinStatus = ((nandInfo->hNandCtrlInfo->WaitPinStatusGet)(nandInfo));
if (waitPinStatus != 0)
// Note: Check "should" be (waitPinStatus != 1); Need to investigate why
// wait pin (~R/B pin) is not toggled on AM335x platform.
{
// NAND flash is ready. Break from the loop.
break;
}
Is this a silicon bug?
We are using processor AM3359
Thanks and regards,
Daniel