Hello,
I currently try to implement a I2C-slave driver for the OMAP3530 processor in linux. One challange for the driver is to find the first byte of a I2C slave receive transfer in the RX FIFO buffer. To implement this properly the hardware should block further i2c-transfers until the ISR fetches a received packet. Else there would be no certainty on whether a second transfer already put its data into the FIFO before the ISR evaluated the previous transfer.
So my question is: is the OMAP3530 I2C hardware able to block the I2c bus after a successful slave transfer and the reception of a stop condition? So far I couldn't find any hint about that in the manual and my current implementation shows, that successive i2c-transfers are possible without ISR intervention, which is indeed not so good.
Thanks in advance for any reply,
Sebastian
