As tried to enable MMU in cortex A8 by calling MMU_enable function with in OMAP3530_cortexA.gel in On_ResetDetected(), it is giving the following output at the end of the output it has printed that MMU is ON and given error: can not write to target at the time of loading program, why this happens when enabling MMU. so suugest me the reason and tell me how to enable MMU in beagle board through this.
OMAP 32K Watchdog Timer is disable
Putting DPLL into bypass before proceeding
Putting CORE DPLL into bypass before proceeding
Locking CORE DPLL
PRCM clock configuration IIA setup has been completed
SystemClock = 19.2 MHz
Cortex_A8_0: Trouble Reading Register: Error 0x80002004/-1203 Fatal
Error during: Register, Control, The DAP access, address 0x000001E4,
has returned a SLAVE error.
Cortex_A8_0: GEL: Error while executing OnTargetConnect(): target failed to read memory at 0x20790600.
DPLL_MULT_VALUE = 242
DPLL_DIV_VALUE = 13
CORE_DPLL_CLK = 663.771 MHz
CORE_CLK = 331.8855 MHz
L3_CLK = 165.9427 MHz
MM01: mDDR Samsung K4X51323PC - 512 Mbit(64MB) on CS0, 4M x 32bit x 4Banks
common_sdram_init() completed
SDRC initilization for mDDR_Samsung_K4X51323PC completed
19.2MHz clock configuration IIa
CORTEXA8_CORE_VERSION = 0x411FC083
CORE_REVISION = 0x00100003
IS NOT COMPREHENDED BY THIS GEL FILE
OMAP 32K Watchdog Timer is disable
Putting DPLL into bypass before proceeding
Putting CORE DPLL into bypass before proceeding
Locking CORE DPLL
PRCM clock configuration IIA setup has been completed
SystemClock = 19.2 MHz
DPLL_MULT_VALUE = 242
DPLL_DIV_VALUE = 13
CORE_DPLL_CLK = 663.771 MHz
CORE_CLK = 331.8855 MHz
L3_CLK = 165.9427 MHz
System Reset has occured.
MMU IS ON:
Cortex_A8_0: Warning: Error 0x40000002/-1065 Warning during: Memory, Invalid memory access at 0x00000000
Cannot write to target
Cortex_A8_0: Warning: Error 0x40020002/-1003 Warning during: Memory,
Internal, The requested emulation action contained an invalid argument
(0x00000000)
Thanks,
Vinay.