TPS65218 I2C I/O Level

Arondimal Savarimuthu

Other Parts Discussed in Thread: TPS65218

Hi,

What is the maximum input high level voltage Vih(max) allowed for SDA and SCL pins of PMIC TPS65218. It is not available in datasheet, it seems.

over 11 years ago

0 Yordan Kovachev over 11 years ago

TI__Guru**** 161600 points

Hi Arondimal,

I2C interface should comply with the I2C Bus specification: http://www.nxp.com/documents/user_manual/UM10204.pdf

See Section 6 Electrical specifications and timing for I/O stages and bus lines in the above mentioned document:

-Some legacy Standard-mode devices had fixed input levels of VIL = 1.5 V and VIH = 3.0 V. Refer to component data sheets.

-Maximum VIH=VDD(max) + 0.5 V or 5.5 V, which ever is lower. See component data sheets.

Best Regards,

Yordan

0 Arondimal Savarimuthu over 11 years ago in reply to Yordan Kovachev

Prodigy 200 points

Hi Yordan,

Thanks for the suggestions,

The supply voltage Vin to this PMIC will be through battery voltage 4.2V(max) or bench supply 5.2V(max) voltage. This power Vin will be given to TPS65218's IN_BIAS pin. There is a pin named INT_LDO available, which is 2.5V. This is for PMIC internal biasing. I would like to know, who is powering PMIC I2C. Is IN_BIAS or INT_LDO powering I2C?

0 Biser Gatchev-XID over 11 years ago in reply to Arondimal Savarimuthu

TI__Guru**** 393215 points

Please post your questions about TPS65218 on the dedicated PMU forum: http://e2e.ti.com/support/power_management/pmu/f/200 This forum is for the Sitara processor family.

0 Arondimal Savarimuthu over 11 years ago in reply to Biser Gatchev-XID

Prodigy 200 points

Thanks Biser

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TPS65218 I2C I/O Level