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Maximum Theoretical Throughput for CPU transfer PCIe : DSP C6678

ZAKARIA BOURZOUK
Intellectual 560 points

hello,

I want to know the maximum rate of data transfer with CPU using PCIe Gen 2.

The following parameters are used:

  •  PCIe Gen2: Transfer data rate = 5Gpbs/ lane. 
  • Used Number of lanes: Num_lanes = 2 lanes (2x)
  •  20% reduction due 8b/10b consideration.

to calculate, I proceed as follows: 

  • CPU 32-bits transfer: 4Bytes/packet

  • Overhead in TLP Packet : 24Bytes (32bit addressing)

  • DLLP packet: 8Bytes

  • Efficiency= Data/(Data+Overhead)= 4/(4+24+8)= 11,11%

  • Throughput= 2 (lanes)*5(Gen2)*11.11% = 142,2 MBps

So, using the encoding 8bit / 10bit I find ==>   Theoretical throughput with 8b/10b = 2 * 5 * 8/10 * 11,11% = 113,8 MBps .

but the problem is that I find the following performance :  

  • 149 MBps for a data transfer  size 16 B    
  • 135 MBps for a data transfer  size  4 MB

which is contradictory with the theoretical maximum throughput !!

Is the method of calculation correct ??

I would like an explanation for this problem.

Thanks,

Zakaria.

 

  • 0
    TI__Mastermind 28085 points

    Hi,

    I think the throughput could be calculated in this way Throughput = (data transferred) / (time elapsed) = (pcie data size) / (TSC cycle * (1/CPU freq)).

    PCIe throughput values are documented in Throughput performance guide for more information refer below link

    EDMA base PCIe test code is available in MCSDK package. Please take a look at section in test code.

    MCSDK Path: \ti\mcsdk_2_01_02_06\tools\boot_loader\examples\pcie\linux_host_loader\pciedemo.c

    Refer readme(C:\ti\mcsdk_2_01_02_06\tools\boot_loader\examples\pcie\docs\) document for more information.

    Thanks,

  • 0 in reply to Ganapathi Dhandapani95
    Intellectual 560 points
    Hi,
    I find just transfer rate by EDMA.
    I want the transfer rate by CPU.

    Thanks,

    Zakaria.