Confused about L2 cache

Emil Ohlsson

Other Parts Discussed in Thread: AM3892

I have a custom board with the AM3892 processor running linux-2.6.37-psp04.00.01.13.patch2 and I got a bit confused whether the L2 cache is enabled or not. From what I could find in the kernel config CACHE_L2X0 is set to [=n]. Is this an indication that it is disabled?

How do I verify if it is enabled, and if it isn't, how do I make sure it is enabled. Are there any other considerations I need to have?

over 11 years ago

0 Biser Gatchev-XID over 11 years ago

TI__Guru**** 393215 points

Moving this to the AM389X forum.

0 Pavel Botev over 11 years ago

TI__Guru**** 170625 points

Hi Emil,

The Cortex-A8 L2 cache is enabled by default in u-boot code:

u-boot/arch/arm/cpu/arm_cortexa8/cpu.c - l2_cache_enable();

u-boot/arch/arm/cpu/arm_cortexa8/ti81xx/cache.S

l2_cache_enable:
push {r0, r1, r2, lr}
mrc 15, 0, r3, cr1, cr0, 1
orr r3, r3, #2
mcr 15, 0, r3, cr1, cr0, 1
pop {r1, r2, r3, pc}

u-boot/board/ti/ti8168/evm.c - l2_cache_enable();

BR
Pavel

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Confused about L2 cache