In our current products, the kernel is loaded from nand flash, and the filesystem is on the SD card. We started having problems with working units in the field that would boot and run, but we could not update the filesystem. After investigation, we determined that the update to the filesystem was failing because of write errors from the SD card subsystem when we tried to write the update file (which is approximately 65MB) to the filesystem.
We started looking through the SD driver code to try and determine what was causing the problems writing to the SD cards (We tested the cards we got write errors from, and they were still good and would work in other devices). We first noticed that only one of the register offsets in the driver code (omap_hsmmc.c), actually matched what was published in sprugx8b.pdf in section 13.4 (and also in the two previous versions of this same document). The SD_HL_SYSCONFIG register offset is correct but all the others were 0x100 less than what the document shows, but the driver seems to work so we assumed the driver is correct. Following the drive code, we determined that the driver was reading the cord specs and passing those specs to the host so that the host side could be configured correctly. We found that although the card was determined to be a high speed card, the host side was never setting the HSPE bit in the SD_HCTL register to enabled. Nowhere in the driver code could I find where the HSPE bit was ever set. Based on scope measurements, we also determined that the description of the HSPE bit appeared to be exactly opposite of what we saw on the scope.
We have tried a resistor in the the clock line from 0 ohms to 50 ohms. We have some units that will boot fine with the 50 ohm resistors but we cannot write to them at all. We have a few with the 50 ohm resistors that will occasionally not even recognize the SD card. We have other units that work just fine with the 50 resistors presently, but then again the other units worked in the field for a while. Taking the resistors down to 0 ohms always seemed to improve the marginal units, but even the worst of those still fail on occasion.
So, what is actually correct in the documentation for the SD subsystem? The driver obviously works most of the time so I can believe the register offsets are wrong in the documentation. There is another register that has the same description as the previous register, so I can believe that is just an error in the documentation. Some of the other bits in the SD_HCTL register list reserved values, that are values actually being set by the driver, is this correct? The description of the HSPE bit, leaves us with the question of whether this is another error in the documentation, and if it is not, why does the driver never set the HSPE bit?
