Other Parts Discussed in Thread: SYSBIOS
Hi,
I am trying to implement the memory protection feature in C6678. While I can find both Sys/Bios and CSL APIs for protection of L1P/L1D/L2Cache, I cannot find the Sys/Bios APIs for protection of shared MSM and DDR memory. Are there some Sys/Bios APIs for protection of MSM/DDR( or more precisely for managing XMC registers)? or CSL APIs are the only way to configure the memory protection registers in the XMC?
Also in case of XMC registers, is there some default mechanism also that sets the memory segments and their accesses in MSM/DDR? or do I have to create segments myself and set their accesses?
Regards
Nikhil