Cache configuration

By default, L1P and L1D configured as all cache and L2 configured as all RAM.
If you want to make L2 as cache or L1 as RAM then you may change it in bootloader or start of application.

This is for C674x DSP devices.

BTW, what is your processor ?

My processor is C64x+. As per Technical Ref Manual (DM37x, sprugn4r), there are two modes of DSP boot. Boot under MPU control (Cold reset) and Autonomous Boot(warm reset). It is stated that under Autonomous Boot, Cache SW configuration is applied since cache configuration registers are already programmed after the cold reset and before the warm reset. So this is clear to me. But very first time when the device is power on (Cold reset) DSP boot happen in MPU control. Is it okay to assume that DSP cache configuration registers (L1PCFG,L1DCFG ,L2PCFG) are programmed by MPU before it resets the DSP?

Ken,

Since you did not supply the information in your original post as to which device you were asking about, we assumed that since you posted to the C64x Forum that your question was about one of these devices, and a recent device in this family would have the characteristics that Titus mentioned.

Because your question is about the DM37xx family, your post should have been put in the DM37x DaVinci Video Processor Forum. A moderator will move this thread there for any further discussion.

Please refer to the L1PCFG and other cache registers in the TRM SPRUGN4r to find their reset states. These reset states are the values that will be in the registers after a cold reset when the device is initialized. If any bootloader runs that changes these states, then you will need to refer to the documentation of that bootloader, including any initialization by the ARM, if it does any bootloading or initialization of the DSP - this is rare, but the bootloader documentation will address it if there are any changes made.

Regards,
RandyP

Thanks Randy! Can you provide the link for the bootloader document? .Thanks in advance!

Ken,

If you have questions about the TRM section on initialization, this is the place to ask them.

If you have a secondary bootloader, that is a different question.

Regards,
RandyP

Thanks Randy!
I do not see complete description on boot-loader regarding cache configuration under TRM section on initialization. Probably we may need secondary boot-loader with initial cache configuration.

Ken,

It is common to use a secondary bootloader to make things work the way you want them to. It is good that you have that flexibility.

The cache configuration will be consistent, so if you run through the boot process and examine the LxxCFG registers, you will be able to determine for yourself what configuration has been done, or not done. My expectation is that no special mention in the initialization section of the TRM means that the registers remain at their default reset state.

Please post here is you run the experiment and determine what the state of the LxxCFG registers are after the bootloader has started or completed.

Regards,
RandyP