5510 Flash addressing

Hi,

Can a TI person please answer this? 

My schematic is about to go to layout and I really need to clear this up. 

Thanks

Aditi.

Which Flash chip are you trying to interface? The answer probably varies depending upon the Flash chip.

Hi Brian,

I am using an ATMEL AT49BV322D (4M byte) Flash. It has 21 address lines.

Regardless of part number we would disable the BYTE pin to have 16-bit access.

Thank you in advance for your help.

Regards,

Aditi.

You need to read the complete documentation from Texas Instruments for the 5510 EMIF. Each C55x chip can have a different EMIF implementation. e.g. The 5506 has a 16-bit EMIF, but the 5510 has a 32-bit EMIF, and they each require different circuits.

1) Does Spectrum Digital use 32-bit Flash on the 5502 DSK?  I believe that A1 is only used for 16-bit memory. I have not looked at these DSK board schematics, but perhaps the 5510 DSK only uses 16-bit memory on the 32-bit EMIF.

2) The 5510 has 4 external memory space ranges. A22-A23 are not available on pins because they are translated to CE0-CE3. This is explained on page 16 of the 5510 data sheet, and also explained in many other places in the complete 5510 documentation. Your 4M Flash should probably use A1-A21. Larger memories would need to decode CEx, or you may need separate chips for each memory space.

3) Byte access, if even supported by the specific EMIF of the 5510, will be slower than word access. You might even want to use a pair of 16-bit chips so that together they make a 32-bit memory which matches the 32-bit EMIF. That would be twice as fast again, but require more Flash chips.

You should probably use A1-A21 for your Atmel Flash, but I have not read the EMIF document for the 5510 to confirm. The complete documentation is spread out across several documents from Texas Instruments, so you need to track down every one that is appropriate and read every page. I chose the 5506 to match the 16-bit EMIF with my 16-bit devices, and thus avoided the 32-bit EMIF of other C55x parts. Unfortunately, that means I'd have to read a different set of documentation to tell you exactly how the 32-bit EMIF will work with your Flash part.

Brian-

I have read the documentation many times and designed 5502 band 5510 based boards and Aditi has a good question.

Flash address line connections are not a matter of choice as you seem to imply.  For successful boot the CE1 EMIF interface has to match bootloader expectations.

If C5502 and C5510 both support 32-bit EMIF and make 32-bit instruction fetches, then why do TI-referenced 5502 designs have Flash address lsb connected to A2 and C5510 designs have Flash address lsb connected to A1?  Is it because of bootloader code?  I would like a knowledgeable TI person to please explain this.  Thanks.

-Jeff

I did not intend to imply that there was any arbitrary choice allowed, but rather that the answer depends upon the width of the memory chip(s) and the specifications for the particular EMIF. It's possible that some EMIF variations do not support 8-bit access, in which case that particular choice is not available.

I also did not see any mention of bootloader concerns. There is documentation for the bootloaders as well.

The only reason I suggest reading the documentation is that the questions seem completely wide open. At least in my experience - which I pointed out does not include the schematics for those two boards - the documentation tells basically all of the story, so I would find it easier to help find an answer if more information were given in the question. One good example of useful information is: What pieces of information seem to be missing from the documentation, or Which Flash parts are used on the DSK boards and how their wiring conflicts with the documentation. e.g. If both boards are using the same part with different wiring, then at least one must be in conflict with the documentation. That would be a good starting point for a focused question.

Brian-

Are you a TI person?  If not can you please, please let a TI person answer this?  There is no need to speculate, you can Google the EVM 5502 and DSK 5510 schematics if you want to see the difference first-hand.  Also I will post the same question on C55x Yahoo group and if you want to get involved there that would be fine.

But in the meantime we have a schematic we're trying to submit to layout and time is critical and I need a simple, concise answer from a knowledgeable TI person.

To repeat the question:

  If C5502 and C5510 both support 32-bit EMIF and make 32-bit instruction fetches,
  then why do TI-referenced 5502 designs have Flash address lsb connected to A2
  and C5510 designs have Flash address lsb connected to A1?  Is it because of
  bootloader code?  For example this occurs in EVM 5502 and DSK 5510 designs
  and in both cases the Flash device is 16-bit wide with /BYTE pulled up... so why
  the difference?

I would like a knowledgeable TI person to please explain this.  Thanks

-Jeff

Hello All,

I'd like to emphasize that these E2E forums are engineer-to-engineer forums so engineers can help each other to drive maximum innovation in an efficient manner. We don't want these to be just E2T (Engineer to TI) forums.

I really appreciate Brian's active posts here and are very much encouraged by TI.

To Jeff's point, if there's an uncertainty in the documentation, that has to be brought to TI's attention. We are monitoring these posts and TI will address the query and take further actions. It'd be useful to look at other engineer's interpretation (like Brian's here) to make sure we remove any ambiguity or shortage of info in the future documentation.

Thanks again for using these forums,

Best Regards,

-Srik Gurrapu

gurrapu@ti.com

C5000 Marketing Manager

Srik-

Thanks for your reply.  I realize now that Brian must be the same Brian that runs Sound Consulting and if so he's a great TI DSP engineer and has posted many times on Yahoo DSP groups (C55x and C6x).  I myself have posted there 1000s of times since 1999, so neither of us is a stranger to E2E type of forums.  Definitely Brian's contributions are valuable to TI.

I'm trying to keep the Q&A concise because we have an engineering group that has to go to layout in the next couple of days and we don't want an "off by one" address line problem in the layout.  Aditi had posted her original question about this on 2 Apr, so that's some time ago.

Maybe it's just a different expectation by the 5502 and 5510 bootloaders?  Thanks in advance for your help.

-Jeff

Brandon-

> If your design is actually using the TMS320VC5510, then I suggest looking at the
>TMS320VC5501 DSK from Spectrum Digital.  It is using a 16-bit wide Flash,
> which is similar to the device you stated you intend to use.

We're following the DSK 5510, which also has 16-bit Flash.  Are there reasons to prefer the DSK 5501 instead?

> In that case, A[20:1] of the DSP is connected to A[19:0] of the flash.

Yes... this is what our designers are doing.

> However, things are a bit different with the TMS320VC5502 and if using that
> device, I encourage you to use the appropriate EVM as a guide.

We have built 5502 boards previously, and followed the EVM 5502 for memory interface.  In those cases DSP A[21:2] was connected to the Flash.

>  That said,
> the corresponding TMS320VC5502 External Memory Interface Reference
> Guide (SPRU621) indicates how to connect to an external device based
> on the data width of the external device.  Section 2.2 of that document
> highlights the internal address bus shift.

Ok thanks for pointing this out.  If your're saying the 5502 has an internal address bus shift when 16-bit data is accessed (but not 32-bit), that gives our guys a direction for study and helps them understand the difference in 5510 vs. 5502 Flash interface, which was the reason for Aditi's initial question.

Thanks Brandon.

-Jeff