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McBSP2 configuration for TDM mode

Other Parts Discussed in Thread: OMAP3530

We are using OMAP3530 processor based board for our audio development.

We have some queries in McBSP2 configuration.


1. The MCBSPLP_RCR1_REG register describes that receive word length but the introductory description explains that word width and data length. What is word length configuration in that register? Is it word width or data length?

2. Is RJUST configuration in MCBSPLP_SPCR1_REG register applicable for TDM mode?

3. We are configuring McBSP2 for TDM mode as follows.
   MCBSPLP_RCR2_REG = RPHASE-Receive Phases = single phase frame
                                          RREVERSE-Receive reverse mode = Data transfer starts with MSB first.
                                          RDATDLY- Receive Data Delay = 0-bit data delay

  MCBSPLP_RCR1_REG = RFRLEN1_MCBSP2 |RWDLEN1_MCBSP2
                                         RFRLEN1 - Receive Frame Length 1 = 8 words per frame
                                         RWDLEN1 - Receive Word Length 1 = 24 bits

  MCBSPLP_SPCR1_REG = DXENA - DX Enabler = DX enabler is on

  MCBSPLP_THRSH1_REG = RTHRESHOLD - Receive buffer threshold value = 255
  MCBSPLP_THRSH2_REG = RTHRESHOLD - Receive buffer threshold value = 255

Is this configuration enough for TDM mode?

 

  • Sakkarai Rasu said:

    We are using OMAP3530 processor based board for our audio development.

    We have some queries in McBSP2 configuration.


    1. The MCBSPLP_RCR1_REG register describes that receive word length but the introductory description explains that word width and data length. What is word length configuration in that register? Is it word width or data length?

    In this case, the “word length” in the introduction and the “word width” in the register description are referring to the same thing. The “word width defines the number of bits used to define each word received. The “data length” describes the size of the valid data within the received word.

    Sakkarai Rasu said:

    2. Is RJUST configuration in MCBSPLP_SPCR1_REG register applicable for TDM mode?

    Yes, if the word width is less than 32 bits.

    Sakkarai Rasu said:

    3. We are configuring McBSP2 for TDM mode as follows.
       MCBSPLP_RCR2_REG = RPHASE-Receive Phases = single phase frame
                                              RREVERSE-Receive reverse mode = Data transfer starts with MSB first.
                                              RDATDLY- Receive Data Delay = 0-bit data delay

      MCBSPLP_RCR1_REG = RFRLEN1_MCBSP2 |RWDLEN1_MCBSP2
                                             RFRLEN1 - Receive Frame Length 1 = 8 words per frame
                                             RWDLEN1 - Receive Word Length 1 = 24 bits

    Both RCR1 & RCR2 settings look fine as long as theses settings match the transmitted frame and word lengths

    Sakkarai Rasu said:

      MCBSPLP_SPCR1_REG = DXENA - DX Enabler = DX enabler is on

    This is only applicable to the transmitter and only necessary if there are multiple transmitters – See section 20.5.1.6.2.2.8 (page 2981) of the TRM.

    Sakkarai Rasu said:

      MCBSPLP_THRSH1_REG = RTHRESHOLD - Receive buffer threshold value = 255
      MCBSPLP_THRSH2_REG = RTHRESHOLD - Receive buffer threshold value = 255

    MCBSPLP_THRSH1_REG is only used for the transmitter.

    Sakkarai Rasu said:

    Is this configuration enough for TDM mode?

    Make sure the pin configuration is set correctly. Assuming the receiver is in salve mode then all three signals will have the input enabled.

    Other things to consider are FSR polarity, CLKR polarity, and full or half cycle FSR capture. The settings for these will depend on the transmitter.

    BRs

      Paul