We are using OMAP3530 processor based board for our audio development.
We have some queries in McBSP2 configuration.
1. The MCBSPLP_RCR1_REG register describes that receive word length but the introductory description explains that word width and data length. What is word length configuration in that register? Is it word width or data length?
2. Is RJUST configuration in MCBSPLP_SPCR1_REG register applicable for TDM mode?
3. We are configuring McBSP2 for TDM mode as follows.
MCBSPLP_RCR2_REG = RPHASE-Receive Phases = single phase frame
RREVERSE-Receive reverse mode = Data transfer starts with MSB first.
RDATDLY- Receive Data Delay = 0-bit data delay
MCBSPLP_RCR1_REG = RFRLEN1_MCBSP2 |RWDLEN1_MCBSP2
RFRLEN1 - Receive Frame Length 1 = 8 words per frame
RWDLEN1 - Receive Word Length 1 = 24 bits
MCBSPLP_SPCR1_REG = DXENA - DX Enabler = DX enabler is on
MCBSPLP_THRSH1_REG = RTHRESHOLD - Receive buffer threshold value = 255
MCBSPLP_THRSH2_REG = RTHRESHOLD - Receive buffer threshold value = 255
Is this configuration enough for TDM mode?