Encode H.264 and JPEG concurrently

Tracy lee

Hi all:

As we know, DM365 support run HDVCP and IMCOP concurrently, but i don't know how to congiture the codec engine to match this.

Now I had tryed to encode 720P H.264 and VGA JPEG at the same time, and i found that encode one H.264 and jpeg frame will cost about 34~35 milliseconds, when encode H.264 only, it will cost 27~28 milliseconds, JPEG will cost 6~7 milliseconds, seems H.264 and JPEG encode don't run concurrently.

Anyone who can tell me how to configture the codec engine to run H.264 encode and jpeg encode concurrently?

Thanks.

over 15 years ago

0 Anshuman Saxena over 15 years ago

TI__Mastermind 19985 points

Tracy,

H.264 encoder and JPEG encodere run on two different hardware engines. But they share the same resources like EDMA channels and some memory. Due to this reason, you might have to run it in sequence.

Now having said that, we have some mechanism in which we can run JPEG and H.264 in parallel. We need to use the following options:

1. Use scratchGroup Id = 1 for H.264 encoder, scratchGroupId = 2 for JPEG in your .cfg file

2. Release some EDMA channels from the kernel. You have to free atleast 4-6 channels and it can be done in edma.c in the linux kernel source code. The choice of channels to remove depends on your use case and the peripherals you use.

3. Turn on enableDDR parameter of H.264 encoder.

If you have IPNC Reference Design software, you can refer to it for item #1 and #3. But in IPNC also, we do not run JPEG and H.264 in parallel.

Please note that MPEG4 and H.264 cannot run in parallel due to EDMA channel limitation, so keep them both in some scratchGroupId.

Regards,

Anshuman

0 Charles Hung over 14 years ago in reply to Anshuman Saxena

Prodigy 240 points

Hi Anshuman,

Refer to "2. Release some EDMA channels from the kernel" you mentioned,

Are there any instructions to known the EDMA channels are being in used?

and could you give us more directions to known how to free the EDMA channels in code?

any comments are appreciated!!

Charles

0 Anshuman Saxena over 14 years ago in reply to Charles Hung

TI__Mastermind 19985 points

Hi,

I would recommend opening a new thread for this question.

In any case, you can look at the EDMA channel allocation in the kernel at the following file

ti-davinci\include\asm-arm\arch-davinci\edma.h

If you look at DM365_DMACH2EVENT_MAP0 and DM365_DMACH2EVENT_MAP1 , you can see the 64 allocations for the EDMA channels. '1' written on the bit [0] means that channel 0 is used by the kernel drivers. Now each channel is associated with a peripheral. So if you dont want say McBSP, please remove the allocation of that EDMA channel from the kernel.

From our experience, EMAC EDMA channels can be released as EMAC uses its own internal DMA channels. I am attaching a reference edma.h file that we used.

Regards,

Anshuman

PS: Please mark this post as verified, if you think it has answered your question. Thanks.

edma.h