• State
  • Locked Locked
  • Replies 5 replies
  • Subscribers 98 subscribers
  • Views 1935 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

SMPTE 125M video output with DM8148 / HDVPSS firmware

user4201415
Prodigy 190 points


Hello,

I have an electronic card with SDI video output. To do that, the 8148 processor sends video signal to GS1662 (a video serializer). SMPTE 125M is the expected standard by GS1662 and our application.

But, HDVPSS does not support SMPTE in "official" mode. I have HDVPSS source code and all HDVPSS documentations. I try to configure correctly without success : GS1662 does not recognize the signal (only it is a SD standard, interlaced and 27 MHz correct clock). For me, TI8148 and SMPTE 125M have some differences in registers naming and it is difficult to link them.

For example, SMPTE 125M needs to mark the first line number for VS of first field. The VS starts in line 1 and the field 1 starts the line 4 (before, it is the previous field). There is a gap between VS starting and Field starting. How to transcribe to TI8148 registers?   If I use "line 4" value for VS starting, would it sends VS information the line 1 to 3 also or not?

Then, HDVPSS says "HS serration pulse". Is it important to respect that (same question about HS equalizer signal)? SMPTE 125M seems to not care about that, and I do not find information concerning HS serration pulse (only VS serration pulse on the Web or others components datasheets).


"DTV_" fields have an interest in my case? I am not sure.

And to finish, HDVPSS seems to use HS in start of line but SMPTE 125M seems to use this information at the end of line. There is incompatibility?

I give you some information concerning my configuration (for me, OSD and VOUT configuration are the same) :

Active width : 720 pixels ; active heigth : 244 lines (first field) and 243 lines (second field)

Total width : 858 pixels ; total height : 525 lines

Pixelclock : 27 MHz

Length of HS signal : 138 pixels ; length of VS signal : 19 lines

Start of HS signal : pixel 1 ; Start of VS signal : line 1 (first field) and line 264 (second field)

Start of first field : line 4 ; Start of second field : line 266

Start of first active line (first field) : line 20 ; Start of first active line (second field) : line 283

Mode (8148) : Single YUV422, 10 bits (in reality 8 bits, bit 0 and 1 are zero and there are no problem with that for GS1662 and SMPTE 125M)

Is it correct?

Thank you in advance for your help, I am available if you need more information.

  • 0
    TI__Guru**** 170625 points
    Are you using DVR RDK?
  • 0 in reply to Pavel Botev
    Prodigy 190 points
    No, it is a personal electronic card with 8148 and I compile myself the HDVPSS firmware.

    I can display a framebuffer or test image (with bars) with this configuration : e2e.ti.com/.../1206822

    But it is 576i, and I would SMPTE 125M (a special 480i standard). I analyzed this configuration but it is not very clear. For me, this configuration not respects the 576i standard and HDVPSS configuration. I tested many configurations but without success. I use embedded 656 synchronization words (and not discrete signals).

    I found some information in the complete HDVPSS documentation :
    * HDVPSS adds VS padding in line 1 to 3, even it is the field 2
    * Like it is a embedded words sync, I don't care about serration pulse

    But the HDVPSS seems to start count lines and pixels by 0. But examples does not match with that. For example REG11 (0x4810A02C) bits 11-0 : Default: 20 (for 480i format) but the line 20 is correct if the first line is 1 and no 0. Then, these register should be 19th because it is the end of 1st VS. If the documentation is correct, it should be 18 but it is strange for me.

    Do you have an idea or some additional information?

    Thank you for your help.
  • 0 in reply to user4201415
    Prodigy 190 points

    I have new information.

    I can configure 480i mode correctly (even GS1662 cannot serialize 480i, it detects 525 lines with 858 pixels/line, 1440 active pixelclock/line and 240 lines per frame). GS1662 says 480i is a interlaced signal, VS and HS signal are detected.

    My registers to set 480i mode :

          devmem 0x48105208 32 0x00000007
          devmem 0x48100114 32 0x0008010D
          devmem 0x48100118 32 0x00000000
          devmem 0x4810a000 32 0x04003058
          devmem 0x4810a028 32 0x1F20D35A
          devmem 0x4810A02C 32 0x3E11A013
          devmem 0x4810a030 32 0x3E2D035A    
          devmem 0x4810A034 32 0x00000105
          devmem 0x4810A038 32 0x000002EF
          devmem 0x4810A03C 32 0x3E2D0089
          devmem 0x4810a040 32 0x00014000  
          devmem 0x4810a044 32 0x000F011B
          devmem 0x4810A048 32 0x030040F0
          devmem 0x4810A04C 32 0x03004108
          devmem 0x4810A050 32 0x0010E10A
          devmem 0x4810a054 32 0x3E2D0072
          devmem 0x4810a058 32 0x00014001
          devmem 0x4810a05c 32 0x000F011B
          devmem 0x4810A060 32 0x110010F0
          devmem 0x4810A064 32 0x11004108
          devmem 0x48100118 32 0x00000004
          devmem 0x4810A000 32 0x44003058

    I use it to develop SMPTE 125M mode, but without success. GS1662 says it is a progressive signal and it does not detect VS sync, I have good information about total lines, pixels per lines and pixel active per lines nevertheless it is not correct concerning lines per fields. I test for the moment with self-test mode to bypass OSD configuration.

    My registers to test SMPTE 125M mode :

        devmem 0x48105208 32 0x00000007
        devmem 0x48100114 32 0x0008010D
        devmem 0x48100118 32 0x00000000
        devmem 0x4810A000 32 0x0400B058
        devmem 0x4810A028 32 0x1F20D35A
        devmem 0x4810A02C 32 0x3E11A013
        devmem 0x4810A030 32 0x3E2D035A
        devmem 0x4810A034 32 0x00000107
        devmem 0x4810A038 32 0x000002EF
        devmem 0x4810A03C 32 0x3E2D0089
        devmem 0x4810A040 32 0x00014000
        devmem 0x4810A044 32 0x000F411B
        devmem 0x4810A048 32 0x130010F3
        devmem 0x4810A04C 32 0x13001108
        devmem 0x4810A050 32 0x0010E10A
        devmem 0x4810A054 32 0x3E2D0072
        devmem 0x4810A058 32 0x00014001
        devmem 0x4810A05C 32 0x000F411B
        devmem 0x4810A060 32 0x110010F3
        devmem 0x4810A064 32 0x11004108
        devmem 0x48100118 32 0x00000004
        devmem 0x4810A000 32 0x4400B058

  • 0 in reply to user4201415
    Prodigy 190 points

    I have an image on my screen in SMPTE 125M mode !

    But, I have wrong colour...

    I use these instructions :

        devmem 0x48105208 32 0x00000007
        devmem 0x48100114 32 0x0008010D
        devmem 0x48100118 32 0x00000000
        devmem 0x4810A000 32 0x04203058
        devmem 0x4810A028 32 0x0020D35A
        devmem 0x4810A02C 32 0x00119012
        devmem 0x4810A030 32 0x002D0000
        devmem 0x4810A034 32 0x00000106
        devmem 0x4810A038 32 0x000002EF
        devmem 0x4810A03C 32 0x002D008C
        devmem 0x4810A040 32 0x00013000
        devmem 0x4810A044 32 0x000F411A
        devmem 0x4810A048 32 0x130000F3
        devmem 0x4810A04C 32 0x13003107
        devmem 0x4810A050 32 0x00109109
        devmem 0x4810A054 32 0x8A2D0084
        devmem 0x4810A058 32 0x00013000
        devmem 0x4810A05C 32 0x000F411A
        devmem 0x4810A060 32 0x130000F3
        devmem 0x4810A064 32 0x13003107
        devmem 0x48100118 32 0x00000004
        devmem 0x4810A000 32 0x44203058

    With that, colours are wrong (is I display framebuffer, bar colour tests are ok), black/white are ok, image is stable...

    If I change

        devmem 0x4810A03C 32 0x002D0089
    to :

        devmem 0x4810A03C 32 0x002D008C

    I have good colours. But GS1662 find 721 pixels (instead of 720) and the image stability is random.


    I think there is a problem with HS sync and the Cb become Cr and vice versa. I do not have an idea to correct theme, my registers are correct normally...

    Do you have an idea ? Thank you in advance !

  • 0 in reply to user4201415
    Prodigy 190 points

    It is ok now, the colour depth it was not correct (24 instead of 32 bits / pixels).