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Am3352 data abort in SPL configuring UART2

CKamas
Intellectual 780 points


Hi all,

I am building a custom board based on Yocto Dizzy.  I have modified the meta files adding my own layer and machine. That all works great.  I then wanted to change to using UART2, so I modified boards.cfg and added:

finese                       arm         armv7       am335x              ti             am33xx      am335x_evm:SERIAL3,CONS_INDEX=3

Now the SPL data aborts at:

void NS16550_init(NS16550_t com_port, int baud_divisor)

called from eserial3_init()

called from preloader_console_init()

called from s_init();

the assembly language is:

LDRB R3,[R0,#20]

R0 is pointing to Uart2 at 0x4802_4000, So adding 20 to that and storing in R3 should be valid and not cause any data aborts.  The registers are valid from 0x4802_4000 to 0x4802_5000.

Let me know if you need more information.

for a screen shot of the debugger at the offending assembly language line see: "www.dropbox.com/.../Screenshot%20from%202015-03-19%2013%3A49%3A01.jpg"

  • 0
    Mastermind 8040 points

    A data abort is also generated if a peripheral is disabled or unreachable.

    Verify whether UART 2 is enabled in PRCM: its clkctrl register (word at 0x44e00070) should read 0x00002, not 0x30000.

    To enable,

    *(u8 volatile *)0x44e00070 = 2;
while( *(u8 volatile *)0x44e00072 & 3 )
        ;

    Given that this is a common procedure needed for most peripherals, there's probably already some helper function for it.

    (Note that in this case it doesn't matter whether a word-write or byte-write is used to enable the module, but it's better to make a habit of using byte-write since a few peripherals have additional config bits in the other bytes of their clkctrl.)

  • 0 in reply to Matthijs van Duin
    Intellectual 780 points
    Matthijs,

    So if I understand you correctly, u-boot is not enabling the uart2 peripherial? I believe that this code in u-boot is supposed to do that:
    lxr.missinglinkelectronics.com/.../clock_am33xx.c

    They look ok to me... a Mask of 3 and a set of 2, just like you recommended.

    Regards,
    Chuck
  • 0 in reply to CKamas
    Intellectual 780 points
    And just to be clear, this code is being called in SPL init.

    Chuck
  • 0 in reply to CKamas
    Mastermind 8040 points

    That looks okay-ish indeed, although I think it's a bit inappropriate u-boot enables all UARTs when only one is needed in practice, and it doesn't poll the register to confirm the module is ready.

    Still, I wouldn't know any obvious alternative reason why reading the UART's LSR might give a data abort. Just to be sure, can you verify the contents of the clkctrl register when the data abort occurs?

  • 0
    Prodigy 80 points

    Hi Chuck,

    I run in a probably similar problem. Did you manage to get the SPL output on UART2 ?

    Thanks

  • 0 in reply to Oswin
    Intellectual 780 points

    Oswin said:

    Hi Chuck,

    I run in a probably similar problem. Did you manage to get the SPL output on UART2 ?

    Thanks

    Yes, I did get it working.  I have moved over to running the Yocto build instead of the SDK, so I am a bit rusty here now.  What exactly is the issue, maybe I can get some brain cells to align again enough to answer it for you. 

    BTW, TI tech support tends to look at new issues, not old threads like this one... So if I can not point you in the right direction, try opening a new thread.

    Regards,

    Chuck

  • 0 in reply to CKamas
    Prodigy 80 points
    My problem was finally not related to the SDK but is some kind of hardware reset problem due to my custom daughterboard layout