AM3352BZCZ100 State of digital I/O pins during Linux Boot - Not high impedance?

Hi Daniel,

Could you specify, which pins are you referring to? As I glance trough AM3352 Data Manual, Section 4.2 Ball Characteristics, Table Table 4-1. Ball Characteristics (ZCE and ZCZ Packages), I see that quite a lot of the AM3352 digital I/O pins are H or L. In their case if the bootloader does not take care of driving those pins to the state you expect they will remain H or L.

Best Regards,
Yordan

Yordan:

Even if the bootloader drives them high or low there is the problem of the time between power on and the bootloader running. The pin in question is SHUTDOWN_REQ, U12 a.k.a. GPIO0_27.

Please advise.

Thanks - Dan

Daniel,

According to Table 4-1 in the AM335X Datasheet Rev. G the state of this pin is "L: High-impedance with an active pulldown resistor" during reset and at at reset release time. Note that depending on your SYSBOOT configuration this pin may be reconfigured by the ROM code at boot time.

Daniel Ulrich said:

Even if the bootloader drives them high or low there is the problem of the time between power on and the bootloader running

The internal pulls are very weak, so an external pull-up resistor (e.g. 1K - 10K) should fix this, provided you avoid the XIP boot modes (which cause the ROM bootloader to mux the pin the GPMC, which I think will drive it low).

Matthijs van Duin said:

provided you avoid the XIP boot modes

Not entirely correct - pin is also used in NAND boot mode.

Biser Gatchev-XID said:

Not entirely correct - pin is also used in NAND boot mode.

Indeed! I should have said GPMC boot modes.