C6657 client example via spi boot.

dmitriy

Prodigy 160 points

Hi. Two months ago I posted a question http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/t/394692

over 10 years ago

0 Raja over 10 years ago

TI__Guru* 81335 points

Hi,
Apologize for the delay.
Please post below information to re-produce the issue.
1. Steps followed in EVM
2. Steps to convert client example .out to .bin.

Thank you.

0 Ganapathi Dhandapani95 over 10 years ago in reply to Raja

TI__Mastermind 28085 points

Also provide the silicon revision of your DSP chip? PG 1.0 or PG 2.0

Thanks,

0 dmitriy over 10 years ago in reply to Ganapathi Dhandapani95

Prodigy 160 points

Thanks for reply. I'll provide necessary info in 4-5 days.

0 Ganapathi Dhandapani95 over 10 years ago in reply to dmitriy

TI__Mastermind 28085 points

Hi,

Ok. Boot ROM(RBL) code not properly done the PLL initialization sequence on PG 1.0 revision the issue is fixed on PG 2.0 revision chips. Refer "Usage Note 9 Minimizing Main PLL Jitter Usage Note" on silicon errata document(SPRZ381A).

www.ti.com/.../sprz381a.pdf

Thanks,

0 dmitriy over 10 years ago in reply to Ganapathi Dhandapani95

Prodigy 160 points

Hi. Chip's revision is PG 1.0.

Steps to convert .out to .bin:

utils\hex6x boot.rmd

utils\bconvert64x -le boot.btbl boot.btbl.bcv64x

utils\b2i2c boot.btbl.bcv64x boot.btbl.bcv64x.i2c

utils\b2ccs boot.btbl.bcv64x.i2c boot.btbl.bcv64x.i2c.ccs

bootbuild my_boot.map

utils\ccs2bin -swap i2crom.ccs spirom_le.swap.bin

boot.rmd

boot.out
-a
-boot
-e _c_int00

ROMS
{
ROM1: org = 0x0400, length = 0x100000, memwidth = 32, romwidth = 32
files = { boot.btbl }

}

my_boot.map

section
{
    boot_mode = 50
    param_index = 0
    options = 1
    core_freq_mhz = 1000
    next_dev_addr_ext = 0x0
    sw_pll_flags = 1
    sw_pll_mult = 19
    sw_pll_prediv = 0
    sw_pll_postdiv = 0
    addr_width = 24
    n_pins = 4
    csel = 0
    mode = 2
    c2t_delay = 0
    bus_freq_mhz = 25
    bus_freq_khz = 0
    exe_file = "boot.btbl.bcv64x.i2c.ccs"
}

I have an EVM board and a custom board. I wrote a simple program with CLI interface via UART. Image boots fine from NOR, i can use CLI menu and do some tests, but NDK doesn't work. When i load that program in Debug mode at CCS - everything works fine, including NDK. In my program i use a function Global_Default_Setup_Silent(), which i took from GEL file.
Thanks for help.

0 dmitriy over 10 years ago in reply to dmitriy

Prodigy 160 points

Is anyone here?

0 Ganapathi Dhandapani95 over 10 years ago in reply to dmitriy

TI__Mastermind 28085 points

Hi,

Have you using .GEL file for initialize the DSP in No-boot mode? If yes, please try to test the same example in with-out .gel initialization.
Have you using IBL for NOR boot?
For my understanding, In No-boot mode .gel initialize the PLL and DDR. But NOR boot mode this are not initialize properly by RBL or second level boot loader.

Thanks,

0 dmitriy over 10 years ago in reply to Ganapathi Dhandapani95

Prodigy 160 points

Hi. I'm using NOR boot without IBL. I use function from .gel file to initialize PLL and DDR after SPI boot. Everything works fine except NDK.
But if i take my own bootloader, boot from NOR and after that load .out with demo from my bootloader - demo works (ping and http).
May be it's really not proper PLL initialization.

0 Ganapathi Dhandapani95 over 10 years ago in reply to dmitriy

TI__Mastermind 28085 points

Yes, PLL workaround is implemented in IBL code. If you are not using IBL means you need to add this workaround on your test code.
Boot ROM(RBL) code not properly done the PLL initialization sequence on PG 1.0 revision the issue is fixed on PG 2.0 revision chips. Refer "Usage Note 9 Minimizing Main PLL Jitter Usage Note" on silicon errata document(SPRZ381A).

www.ti.com/.../sprz381a.pdf

Thanks,

0 dmitriy over 10 years ago in reply to Ganapathi Dhandapani95

Prodigy 160 points

OK, i'll look at IBL sources and try to fix PLL in my bootloader.
Thanks.

0 Ganapathi Dhandapani95 over 10 years ago in reply to dmitriy

TI__Mastermind 28085 points

Yes, That is the perfect solution.

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C6657 client example via spi boot.