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AM335x: LCDC underflow restart errata workaround

Gunter Schmer
Genius 14252 points
Other Parts Discussed in Thread: DA8XX

Hi,

The AM335x errata advisory 1.0.28 has a vague description, it shows to set a number of reset bits and then "Wait several cycles" before setting additional reset bits and then the LCDEN.

Can you clarify how many CPU clock cycles to wait exactly? Otherwise it will be a potential race condition.

 

Regards,

--Gunter

  • 0
    TI__Guru**** 393215 points

    Hi Gunter,

    I will ask for a clarification on this.

  • 0 in reply to Biser Gatchev-XID
    TI__Guru**** 161600 points

    Hi Gunter,

    In the mean time, you can check the da8xx-fb.c driver, located in drivers/video/fbdev & the display.c source code in mach-omap2 folder.

    Best Regards,
    Yordan

  • 0 in reply to Yordan Kovachev
    TI__Genius 14252 points
    Hi Yordan,

    here is what I can see in the da8xx-fb.c

    if ((stat & LCD_SYNC_LOST) && (stat & LCD_FIFO_UNDERFLOW)) {
    lcd_disable_raster(DA8XX_FRAME_NOWAIT);
    lcdc_write(stat, LCD_MASKED_STAT_REG);
    lcd_enable_raster();


    The function lcd_disable_raster(DA8XX_FRAME_NOWAIT); is waiting correctly for the frame done status.

    The lcd_enable_raster function is waiting several times with mdelay.

    /* Enable the Raster Engine of the LCD Controller */
    static void lcd_enable_raster(void)
    {
    u32 reg;

    /* Put LCDC in reset for several cycles */
    if (lcd_revision == LCD_VERSION_2)
    /* Write 1 to reset LCDC */
    lcdc_write(LCD_CLK_MAIN_RESET, LCD_CLK_RESET_REG);
    mdelay(1);

    /* Bring LCDC out of reset */
    if (lcd_revision == LCD_VERSION_2)
    lcdc_write(0, LCD_CLK_RESET_REG);
    mdelay(1);

    /* Above reset sequence doesnot reset register context */
    reg = lcdc_read(LCD_RASTER_CTRL_REG);
    if (!(reg & LCD_RASTER_ENABLE))
    lcdc_write(reg | LCD_RASTER_ENABLE, LCD_RASTER_CTRL_REG);
    }


    I dont think I see the workaround implemented completely, but the above seems to be the way to restart the LCDC based on lost sync and FIFO underflow.


    Please let me know if you see any additional code specific to the workaround.


    Regards,
    --Gunter
  • 0 in reply to Gunter Schmer
    TI__Guru**** 161600 points
    Hi Gunter,

    I couldn't find other code related to the Disable and Software Reset Sequence workaround.

    Best Regards,
    Yordan