Grace on MSP430FR5969 causes CS3 Error: PMM overload and perpetual reset

Using latest Grace, and just trying to set the SMCLK/MCLK frequency to 16 MHz on an MSP430FR5969.

Grace_init() uses CS_A_graceInit AND several calls CS_clockSignalInit, doing MCLK first, which would appear to avoid the problem. But it does not because within CS_clockSignalInit, several sequential writes  are made to CSCTL2  which appear to cause the  CS3: PMM overload in the errata:  slaz473j.pdf

In CS_S_init.c

    CS_clockSignalInit(CS_MCLK, CS_DCOCLK_SELECT, CS_CLOCK_DIVIDER_1);
    CS_clockSignalInit(CS_SMCLK, CS_DCOCLK_SELECT, CS_CLOCK_DIVIDER_1);
    CS_clockSignalInit(CS_ACLK, CS_VLOCLK_SELECT, CS_CLOCK_DIVIDER_1);

Then in cs.c

   switch(selectedClockSignal)
    {
    case CS_ACLK:
        assert(
            (CS_LFXTCLK_SELECT == clockSource)  ||
            (CS_VLOCLK_SELECT == clockSource)   ||
            (CS_LFMODOSC_SELECT == clockSource)
            );

        clockSourceDivider = clockSourceDivider << 8;
        clockSource = clockSource << 8;

        HWREG16(CS_BASE + OFS_CSCTL2) &= ~(SELA_7);
        HWREG16(CS_BASE + OFS_CSCTL2) |= (clockSource);
        HWREG16(CS_BASE + OFS_CSCTL3) &= ~(DIVA0 + DIVA1 + DIVA2);
        HWREG16(CS_BASE + OFS_CSCTL3) |= clockSourceDivider;
        break;
    case CS_SMCLK:
        assert(
            (CS_LFXTCLK_SELECT == clockSource) ||
            (CS_VLOCLK_SELECT == clockSource) ||
            (CS_DCOCLK_SELECT == clockSource) ||
            (CS_HFXTCLK_SELECT == clockSource) ||
            (CS_LFMODOSC_SELECT == clockSource)||
            (CS_MODOSC_SELECT == clockSource)
            );

        clockSource = clockSource << 4;
        clockSourceDivider = clockSourceDivider << 4;

        HWREG16(CS_BASE + OFS_CSCTL2) &= ~(SELS_7);
        HWREG16(CS_BASE + OFS_CSCTL2) |= clockSource;
        HWREG16(CS_BASE + OFS_CSCTL3) &= ~(DIVS0 + DIVS1 + DIVS2);
        HWREG16(CS_BASE + OFS_CSCTL3) |= clockSourceDivider;
        break;
    case CS_MCLK:
        assert(
            (CS_LFXTCLK_SELECT == clockSource) ||
            (CS_VLOCLK_SELECT == clockSource) ||
            (CS_DCOCLK_SELECT == clockSource) ||
            (CS_HFXTCLK_SELECT == clockSource) ||
            (CS_LFMODOSC_SELECT == clockSource)||
            (CS_MODOSC_SELECT == clockSource)
            );

        HWREG16(CS_BASE + OFS_CSCTL2) &= ~(SELM_7);
        HWREG16(CS_BASE + OFS_CSCTL2) |= clockSource;
        HWREG16(CS_BASE + OFS_CSCTL3) &= ~(DIVM0 + DIVM1 + DIVM2);
        HWREG16(CS_BASE + OFS_CSCTL3) |= clockSourceDivider;
        break;
    }

So when I use Grace_init() and set the freq to 16 MHz, the board just goes into perpetual restart.  Leaving it at the default 1 MHz works OK.