SRIO NREAD timeout error

I'm struggling to get a small NREAD transaction to work from a C6678 to an FPGA. Problem is I don't fully understand the meaning of several registers.

• The DSP talks to the FPGA via a 1 port 4x wide link at 5 Gbps;  NO switch involved.
• Using DirectIO only
• Only 1 core is accessing the SRIO (only check the LSU full bit, not the busy bit)
• DSP SRIO ID is 0xD, the FPGA SRIO ID is 0xA
• NWRITE of 18+ MB seems to work fine, based on debugging the FPGA end.
• NREAD of 8 bytes returns a timeout condition code (CC = 1) in LSU_stat
• The DSP memory that is supposed to contain the response never gets changed.
• Response timeout is set to all FFFFFF, the gel script reports .503 seconds as the timeout value.
• For testing, I send an NREAD followed ~100 ms later by the NWRITE every 2 seconds.
• The NWRITE works, the NREAD times out.

I've tried doing  SP0_LM_REQ with a command of 0x4 (Input Status), and this returns an ACK_ID that is incrementing, which seems correct, but the LINK_STATUS is ERROR_STOPPED.  However, I'm not sure I believe that since the GEL script reports the following from SP0_ERR_STAT suggesting the port is not in the stopped state.

C66xx_0: GEL Output:  *******************Port0 Error and Status CSR*******************
 
C66xx_0: GEL Output:  PORT_UNINITIALIZED  => Input and output ports  ##ARE INITIALIZED##  
C66xx_0: GEL Output:  PORT_OK             => Port  ##OK##  condition
C66xx_0: GEL Output:  PORT_ERROR          => The input or output port  ##HAS NOT ENCOUNTERED##  an unrecoverable HW error
C66xx_0: GEL Output:  PORT_UNAVL          => The port is  ##AVAILABLE##  for use
C66xx_0: GEL Output:  PORT_WRITE_PND      => The port  ##HAS NOT ENCOUNTERED##  a condition which required it to initiate a Maintenance Port-write operation
C66xx_0: GEL Output:  INPUT_ERROR_STP     => The input port  ##IS NOT##  in the 'input error-stopped' state
C66xx_0: GEL Output:  INPUT_ERROR_ENC     => The input port  ##HAS NOT ENCOUNTERED##  a transmission error
C66xx_0: GEL Output:  INPUT_RETRY_STP     => The input port  ##IS NOT##  in the 'input retry-stopped' state
C66xx_0: GEL Output:  OUTPUT_ERROR_STP    => The output port  ##IS NOT##  in the 'output error-stopped' state
C66xx_0: GEL Output:  OUTPUT_ERROR_ENC    => The output port  ##HAS NOT ENCOUNTERED##  a transmission error
C66xx_0: GEL Output:  OUTPUT_RETRY_STP    => The output port  ##HAS NOT RECEIVED##  a packet-retry control symbol and/or is not in the 'output retry-stopped' state.
C66xx_0: GEL Output:  OUTPUT_RETRIED      => The output port  ##HAS NOT RECEIVED##  a packet-retry control symbol and cannot make forward progress.
C66xx_0: GEL Output:  OUTPUT_RETRY_ENC    => The output port  ##HAS NOT ENCOUNTERED##  a retry condition
C66xx_0: GEL Output:  OUTPUT_DEGRD_ENC    => The output port  ##HAS NOT ENCOUNTERED##  a degraded condition
C66xx_0: GEL Output:  OUTPUT_FLD_ENC      => The output port  ##HAS NOT ENCOUNTERED##  a failed condition
C66xx_0: GEL Output:  OUTPUT_PKT_DROP     => The output port  ##HAS NOT DISCARDED##  a packet
C66xx_0: GEL Output:  TXFC                => Receiver-based flow control
C66xx_0: GEL Output:  IDLE_SEQ            => Idle sequence 1 is active.
C66xx_0: GEL Output:  IDLE2_EN            => Idle sequence 2  **DISABLED**  for baud rates < 5.5 GBaud
C66xx_0: GEL Output:  IDLE2               => Idle sequence 2  **NOT SUPPORTED**  for baud rates < 5.5 GBaud

Also, SP0_ACKID_STAT has the inbound ACKID always = 0.  Seems like this should be incrementing, but it doesn't.  Doc says it and the Outstanding ID fields are read only, but "Software Assisted Error Recovery" (Preliminary) doc I have says they should all be written to be equal. 

I've been working on this for a while and am starting to run out of ideas.  Any clue as to where I should look?  I've put the code that does the NREAD below.  It just writes the LSU to dispatch the NREAD then polls until it gets the completion code for that transaction.

Many thanks in advance for any help.

Mike

fpgaCmdData[0] = 0xa0a0a0a0;
fpgaCmdData[1] = 0x05050505;
 
                  /* Make sure there is space in the Shadow registers to write*/
while(CSL_SRIO_IsLSUFull(hSrio, LSU1) != 0);
 
                                 /* This reads REG6 to get the LTID and LCB   */
CSL_SRIO_GetLSUContextTransaction(hSrio, LSU1, &tcontext, &txnid);
 
lsuXfr.rapidIOMSB    = 0;                 // MSW of the destination address. None
lsuXfr.doorbellValid = 0;                 // no doorbell
lsuXfr.intrRequest   = 0;                 // No interrupts
lsuXfr.supInt        = 0;                 // suppress good interrupt = 0 (don't care about interrupts)
lsuXfr.xambs         = 0;                 // xambs = 0
lsuXfr.priority      = 0;                 // priority = 0
lsuXfr.outPortID     = 0;                 // outport id = 0
lsuXfr.idSize        = 0;                 // id size = 1 for 16bit device IDs
lsuXfr.srcIDMap      = 1;                 // src id map = 1, using RIO_DEVICEID_REG1
lsuXfr.dstID         = fpga_Id_8bit;      // destid = 0x0A
lsuXfr.hopCount      = 0;                 // hop count = 0,
lsuXfr.doorbellInfo  = 0;                 // doorbell = 0
lsuXfr.ttype   = 0x4;            // ttype,   NREAD
lsuXfr.ftype   = 0x2;            // ftype,   NREAD
 
lsuXfr.rapidIOLSB    = 0x02000050;                 // LSB of the destination address.
lsuXfr.dspAddress    = (uint32_t)&fpgaCmdData;  // dsp address is the source for the data write
lsuXfr.bytecount     = 8;                       // number of bytes to send; always 2 words
 
CSL_SRIO_SetLSUTransfer(hSrio, LSU1, &lsuXfr);             //Busy bit is now 0
 
do
{
   CSL_SRIO_GetLSUCompletionCode(hSrio, LSU1, txnid, &completion_code, &context_bit);
}while (tcontext != context_bit);