Number of outstanding NREAD SRIO (Direct I/O) requests supported

Marton Feher

Hi,

I have trouble finding information on how many outstanding NREAD requests are supported by the Keystone SRIO architecture?
Am I right thinking it's practically infinite (providing I don't run out of free TID-s)?

http://www.ti.com/lit/ug/sprugw1b/sprugw1b.pdf Chapter 2.3.2.3 doesn't give any hint on this.
I've also searched around the forum but didn't find an explicit confirmation on this, in the answered questions the DSP acts as a master and not the other way around.

Extreme example:
The far end device (master) sends NREAD requests towards the DSP (slave) to a specific DSP address continuously without waiting for the response
(having sent out multiple requests until the response for the first one arrives).
The SRIO headers of the requests are identical apart from srcTID (Effectively polling that address).
Would that be a feasible?

Thanks,

Marton

over 10 years ago

0 Marton Feher over 10 years ago

Prodigy 70 points

My colleague pointed me to a resource I didn't read before:
processors.wiki.ti.com/.../SRIO_Implementation_Facts
According to this (and if my interpretation is correct) the MAU can buffer 4 NREAD request if it can't send the responses due to TX collision.
Would that be the limiting bottleneck in a simple scenario, where the DSP only responds to requests (and never initiates any TX operations on its own --> there is no TX collision/bottleneck)?
In other way: is the MAU and the VBUS faster than the SRIO, can they serve a continuous NREAD flow if there is no other SRIO operation in the background?

0 Ganapathi Dhandapani95 over 10 years ago in reply to Marton Feher

TI__Mastermind 28085 points

Yes, your understanding is correct.

0 Marton Feher over 10 years ago in reply to Ganapathi Dhandapani95

Prodigy 70 points

Hi Ganapathi.

I'm not entirely sure I understand what you are referring to.
Can you please formulate your answer as an explicit statement?
Thanks in advance,

Marton

0 Ganapathi Dhandapani95 over 10 years ago in reply to Marton Feher

TI__Mastermind 28085 points

Hi,

If the DSP core executing NREAD transaction means the NREAD flow working contentiously. If you don't want response means better to disable Packet Response Time-out error enable bit field on ERR_EN register.

Thanks,

0 Marton Feher over 10 years ago in reply to Ganapathi Dhandapani95

Prodigy 70 points

Hi Ganapathi,

I'm a bit confused as it doesn't seem you've understood my question:
What if a far-end device sends NREAD requests to the DSP continuously?
Can you please go back and re-read my original post and my first reply with that in mind?

Thanks in advance, have a nice day,

Marton

0 Ganapathi Dhandapani95 over 10 years ago in reply to Marton Feher

TI__Mastermind 28085 points

Hi,

The Master device can send an unlimited number of NREAD requests to our DSP slave device. There is not limit. They will be buffered accordingly until they can be responded too. Now, DSP do have a self-imposed limit on the number of outstanding DMA transactions that we can issue inside our device from SRIO. That number is 4. So, if 5 NREAD requests come into the peripheral, we can send up to 4 VBUS read requests, but the 5th one must wait to be sent until VBUS returns the data from one of the prior 4 reads.

Thanks,

Processors

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Number of outstanding NREAD SRIO (Direct I/O) requests supported