TMS320c6747 McASP problem with interrupt

Hi，TI experts:

     We developed a c6747 board, using McASP0 to drive codec chip (AD73311). 

     The codec chip need an external clk to generate its serial port master clk for communication with DSP. We use AHCLKX to generate a 3MHz clk for the codec, and both ACLKR and ACLKX are set external. The transfer mode is burst, and interrupt is used to service.

     Here is the McASP init code: 

// 1. Reset McASP to default values
mcasp->regs->GBLCTL = 0;         // reset
mcasp->regs->RGBLCTL = 0;      // reset RX
mcasp->regs->XGBLCTL = 0;       // reset TX

// 2. Configure McASP Audio FIFO
// MCASP0_WFIFOCTL = 0x00001008; //8 transmiter, 8 words FIFO 
// MCASP0_WFIFOCTL = 0x00011008; //enable it
// MCASP0_RFIFOCTL = 0x00001008; //8 receiver, 8 words FIFO 
// MCASP0_RFIFOCTL = 0x00011008; //enable it

// 3. Configure all McASP registers except GBLCTL
// (a) Receive registers

// (b) Transmit registers
mcasp->regs->XMASK = 0xFFFFFFFF;             // no padding used
mcasp->regs->XFMT = 0x00018078;                // 1-bit delay, MSB, 16-bits slot, Reads on the peripheral configuration port
mcasp->regs->AFSXCTL = 0x00000000;         // burst, 1-bit frame sync width, external frame sync, rising edge
mcasp->regs->ACLKXCTL = 0x000000C0;     // falling edge, external CLK, asynchronous clk
mcasp->regs->AHCLKXCTL = 0x00008007;   // int CLK, 24MHz AUXCLK div by 8
mcasp->regs->XTDM = 0x00000001;                // slots0 active
mcasp->regs->XINTCTL = 0x00000020;          // set interrupt
mcasp->regs->XCLKCHK = 0x00FF0003;

// (c) Serializer registers 
MCASP0_SRCTL0 = 0x0001;                 // MCASP0.AXR0[0] --> SDI1

// (d) Global registers
mcasp->regs->PFUNC = 0x00000000;                 // all McASP;
mcasp->regs->PDIR = 0x08000001;                    // input: AFSR, AFSX, ACLKR, ACLKX, AXR1
                                                                                      // output: AHCLKX, AXR0
mcasp->regs->DLBCTL = 0x00000000;              // loop back not used

// 4. Start AHCLKX
mcasp->regs->XGBLCTL |= GBLCTL_XHCLKRST_ON; 
while ( ( mcasp->regs->XGBLCTL & GBLCTL_XHCLKRST_ON ) != GBLCTL_XHCLKRST_ON ); 
mcasp->regs->RGBLCTL |= GBLCTL_RHCLKRST_ON; 
while ( ( mcasp->regs->RGBLCTL & GBLCTL_RHCLKRST_ON ) != GBLCTL_RHCLKRST_ON );

// 5. Start ACLKX and ACLKR
Led3(0);

// 6. Setup data acquisition as required
mcasp_interrupt_init();

// 7. Activate serializers
mcasp->regs->XSTAT = 0x0000FFFF;                               // Clear all
mcasp->regs->XGBLCTL |= GBLCTL_XSRCLR_ON; // transmitter
while ( ( mcasp->regs->XGBLCTL & GBLCTL_XSRCLR_ON ) != GBLCTL_XSRCLR_ON );

// 8. Verify that all transmit buffers are serviced

// 9. Release state machines from reset
mcasp->regs->XGBLCTL |= GBLCTL_XSMRST_ON; 
while ( ( mcasp->regs->XGBLCTL & GBLCTL_XSMRST_ON ) != GBLCTL_XSMRST_ON );

// 10. Release frame sync generators from reset.
mcasp->regs->XGBLCTL |= GBLCTL_XFRST_ON; // transmitter
while ( ( mcasp->regs->XGBLCTL & GBLCTL_XFRST_ON ) != GBLCTL_XFRST_ON );

Here are the interrupt functions:

void mcasp_interrupt_init()
{
CSL_FINS(intcRegs->INTMUX2, INTC_INTMUX2_INTSEL8, MCASP_INT);                 // map event McASP_INT to int8 
ISTP = (unsigned int)intcVectorTable;     // set ISTP to point to the vector table address
ICR = 0xFFFF;                                               // clear all interrupts, bits 4 thru 15
IER = 0x00000102;                                      // Enable interrupt 8
_enable_interrupts();
}

interrupt void mcasp_interrupt()
{
int i;

int_num += 1;

mcasp->regs->XBUF0 = 0xFFFF;

mcasp->regs->XSTAT = 0xFFFF;

for(i=0;i<100;i++) {;}
}

      Step 5 of the McASP init process is to give an SE to the codec, after which all the serial port clocks (375kHz) and the frame sync signals (23.43kHz) are generated by the codec chip.

      The interrupt service function mcasp_interrupt() could only be run once after step 7, and no interrupts were generated afterwards.

     So could you please help me to fix problem?