EDMA link plus chain related question

Hi Sivaraj,

Thanks for your quick reply, however let me explain my requirement clearly to see the possible option:


a) I have 4 source memory locations with 64 bytes data each.
b) I have one destination location which is big enough to hold 64*4 Bytes.

So my requirement is to prepare a ParamSet link with 4 source addresses and destination(with different offset for each source landing area) and trigger a DMA transfer for first ParamSet data and wait for DMA done( i want to see DMA done only after all 4 sources data transferred to destination). This is avoid CPU involvement for each trigger.

Can this be achieved using chained EDMA or QDMA on AM1808 SoC?


Best Regards,
Nagi

Hi Nagi,

Thanks for your update.

You will get transfer completion acknowledgement for each trigger and data transfer complete. Yes it is possible using chained EDMA trigger method through which PaRAM sets can be linked with multiple transfers with different source and destination address, but for each transfer, the completion would be acknowledged seperately.

Thanks & regards,

Sivaraj K

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Hi Sivaraj,
This is indeed good information.
Would it be possible for you to point me to get some example code for this?

Best Regards,
Nagi

Hi Sivaraj,

With your suggestion, i am thinking of below logic to achieve my requirement:

Ex:

a) No Of ParamSets used 4 (2 for Ch1 and 2 for Ch2)
b) Link first two ParamSets for Ch1 and Chain the Ch1 with Ch2.
c) Link Second two ParamSets for Ch2 and Chain Ch2 with Ch1.
d) Now trigger the Ch1 using CPU.
e) Ch1 finishes the first transfer and starts Ch2(no CPU involvement is needed).
f) Ch1 ParamSets gets reloaded(say, ParamSet2 -> ParamSet1) ( No CPU involvement)
g) Ch2 Finishes its first transfer and trigger Ch1 ( No CPU involvement) also Ch2 side ParamSet reload happens(Say ParamSet4->ParamSet3)
h) Ch1 finishes second transfer and trigger the Ch2(No CPU involvement)
i) Ch2 Finishes second transfer and trigger Ch1(No ParamSet is available hence no transfer.


Would you pls let me know whether this works with Chaining + Linking ?

Best Regards,
Nagi

Hi Nagi,

To my knowledge, the above logic should work fine since the triggering source is chained event based and reload happens with linked PaRAM sets mapped accordingly.

Thanks & regards,

Sivaraj K

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Hi Sivaraj,

Linking + Chaining worked. Thanks for your help on this.
Now, I got into different issue while allocating channels from EDMA CC1.
I tried passing channel numbers from 32-63 to the function edma_alloc_channel() (this is available as part of Linux 2.6.33-rc4 version of the edma driver), but allocation failed as there is no logic to convert this channel number from 32 to 0 of EDMA CC1.

The reason is below:
The below macros are used in the driver and they work as long as we are passing channel numbers in the range of 0-32 only.
////////////////////////////////////////////////////////////////////////////
#define EDMA_CTLR_CHAN(ctlr, chan) (((ctlr) << 16) | (chan))
#define EDMA_CTLR(i) ((i) >> 16)
///////////////////////////////////////////////////////////////////////////

If someone wanted to use channels of CC1 then this driver seems like does not support unless we change these macros.

Would it be possible for you to let me know whether this is a limitation from driver side or any other reason for not supporting driver for EDMA CC1 channels?

Note: EDMA CC0 channels allocation works fine as the channel numbers are in the range of 0-32.

Best Regards,
Nagi

Hi Nagi,

It should be limitation from the driver side which accepts the limited range on EDMACC0 channels from 0 to 32.

Thanks & regards,

Sivaraj K

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Thanks Sivaraj.

I have now added required code to allocate channels from EDMA3 CC1, configure the required EDMA CC1 , Shadow region 0 and Transfer Controller 2 registers to use EDMA3 channels, but i am not successful in doing the EDMA transfer yet.

It would be really helpful if you or anyone can help me with some pointers to check why the EDMA is not happening on AM1808?

Anyone has faced any issues with EDMA CC1 on AM1808?

I am using Linux kernel 2.6.33 on AM1808 board.

BTW, EDMA3 CC0 works fine.

Best Regards,
Nagi