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DM8148 emac RGMII rx problem

Boris-Ben shapiro
Expert 1300 points

Hi All.

I am Using a DM8148 board ARM+DSP with latest PSP from ti. I encounter some trouble during the upgrade of the EMAC interface from GMII to RGMII.
The phy (MAX24287) supports 1000base-X and SGMII communication to neighboring device, and is connected to the processor with RGMII as mentioned.
I have a fibre optic connected into the phy (1000base-X communication i think), and on the other-side the fiber optic is connected to a RJ-45 adapter and straight into the computer. Both computer and device are configured to be on the same network/subnet (and their default gateway is set to each other - just in case :-)

I have wireshark on the computer, and i can see ARP packets coming in from the device, and replies going back. But on the device's side i can see no rx packets. when i look into the hw_stats of the Ethernet interface, i see tx packets counters increment (even though there are some runts), but no rx packets counter, instead only 2 rx counters are exist and increment: rxaligncodeerrors and rxfragments.

I inserted prints in the cpsw rx handler, and i don't see them, means it's not even being called. 
When i put a scope on the rx data lines between the processor and MAC, i see data that looks valid (also clock is valid as is synchronized correctly with data), i cannot put a scope between PHY and the cage because those are differential lines and i do not have a differential scope.

Anybody has an idea what could be cause, or where should i look into??

Please Help :-0
Much Appreciated.

  • 0
    TI__Guru**** 170625 points

    Hi MoonDrop,

    The latest u-boot code base (which also come with latest PSP 4.04.00.02) is as below:
    http://arago-project.org/git/projects/u-boot-omap3.git?p=projects/u-boot-omap3.git;a=shortlog;h=refs/heads/ti81xx-master

    Have a look in u-boot/board/ti/ti8148/evm.c file. You will see that GMII mode is set for silicon revision (PG) 1.0, while for higher silicon revisions 2.0, 2.1 and 3.0 RGMII mode is used. See pinmux and GMII_SEL register settings. TO sum up, the RGMII is the default mode used in u-boot.

    For using custom ethernet PHY, see the below wiki page:
    processors.wiki.ti.com/.../TI81xx_PSP_Porting_Guide

    Regards,
    Pavel

  • 0 in reply to Pavel Botev
    Expert 1300 points

    Hi.
    I have just the code you referred me to. I cannot see anywhere in the board file any reference to GMII_SEL register. 
    There is a cpsw_pad_config function which handles pin mux. phy_init and board_init function which does not contain any reference/write/modification to GMII_SEL register. where should i look please?

  • 0 in reply to Boris-Ben shapiro
    TI__Guru**** 170625 points

    u-boot/arch/arm/include/asm/arch-ti81xx/cpu.h
    #define GMII_SEL (CTRL_BASE + 0x650)

    u-boot/board/ti/ti8148/evm.c

    /*
    * Basic board specific setup
    */
    int board_init(void)
    {
    ..........
    if (PG2_1 <= get_cpu_rev()) {
    /*program GMII_SEL register for RGMII mode */
    __raw_writel(0x30a,GMII_SEL);
    }
    ......
    }