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Problems in U-boot for AM335x with SPI NOR Flash Spansion S70FL01GS.

Other Parts Discussed in Thread: AM3352, TPS65217, TPS65910

Hi, we are using two SPI NOR Flash Spansion S70FL01GS ON a custom board with AM3352 processor.

We have problems after flashing it to start the U-boot and Kernel.

At this phase of the project, we upload to flash the files MLO.byteswap and u-boot.img,
loaded from UART using the following commands (from TI U-boot wiki):

U-Boot # sf probe 0:0
U-Boot # sf erase 0 +80000
U-Boot # sf write ${loadaddr} 0 ${filesize} (after loaded MLO.byteswap with UART0 using kermit)
U-Boot # sf write ${loadaddr} 0x20000 ${filesize} (after loaded u-boot.img with UART0 using kermit)

After reset, what we found is that the SPL is booted correctly but it hangs and U-boot does not start.
In addition to that, we verify that after the command sf probe 0:0, two chipselect SPI0_CS0 and SPI0 CS1 are selected at the same time.

We tried to use as U-boot base source code, the one provided with SDK 08.00.00.00 and the official U-boot release "u-boot-2015.01", both show the same behaviour.

Thanks in advance to anyone who can help us,

Francesco.

  • Hi Francesco,

    I will forward this to the SW team. Have you configured your DDR as described in the wiki: http://processors.wiki.ti.com/index.php/AM335x_EMIF_Configuration_tips ? U-boot is loaded into external memory and if it's not configured properly the system will hang.

  • Today we compiled the U-boot source code with debug option. After flashing one of the two chips of S70FL01GS, i.e. S25FL512S, we reset the board and we found that U-boot is blocked at this steps:

    SF: not require to enable bank0
    Jumping to U-Boot
    image entry point: 0x80800000

    Any suggestion is more than welcome.

  • Thank you Biser,
    we configured the DDR as for Beagle Bone Black, because we use exactly the same chip.
    What is strange is that when we use the UART to upload u-boot-spl.bin (after the CCCCCC) and then the u-boot.img all works fine.
    But when we flash the SPI with MLO.byteswap and then u-boot.img the board hangs at SPL.
    With Debug Option we verified that it is blocked at these steps:

    .....
    SF: not require to enable bank0
    Jumping to U-Boot
    image entry point: 0x80800000

    Thanks in advance for the reply,
    Francesco.
  • Hi Francesco,

    Can you share how did you build your u-boot for SPI flash?
    Have you done any modifications to the am335x_evm_config (am335x_evm.h)?

    Best Regards,
    Yordan
  • Hi Yordan,
    we modified the am335x_evm.h and we compiled the U-boot with the option am335x_evm_spiboot_config.
    This is our code of am335x_evm.h:

    /*
    * am335x_evm.h
    *
    * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
    *
    * This program is free software; you can redistribute it and/or
    * modify it under the terms of the GNU General Public License as
    * published by the Free Software Foundation version 2.
    *
    * This program is distributed "as is" WITHOUT ANY WARRANTY of any
    * kind, whether express or implied; without even the implied warranty
    * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
    * GNU General Public License for more details.
    */

    #ifndef __CONFIG_AM335X_EVM_H
    #define __CONFIG_AM335X_EVM_H

    #include <configs/ti_am335x_common.h>

    #ifndef CONFIG_SPL_BUILD
    # define CONFIG_FIT
    # define CONFIG_TIMESTAMP
    # define CONFIG_LZO
    # ifdef CONFIG_ENABLE_VBOOT
    # define CONFIG_FIT_SIGNATURE
    # define CONFIG_RSA
    # endif
    #endif

    #define CONFIG_SYS_BOOTM_LEN (16 << 20)

    #define MACH_TYPE_TIAM335EVM 3589 /* Until the next sync */
    #define CONFIG_MACH_TYPE MACH_TYPE_TIAM335EVM
    #define CONFIG_BOARD_LATE_INIT

    /* Clock Defines */
    #define V_OSCK 24000000 /* Clock output from T2 */
    #define V_SCLK (V_OSCK)

    /* Custom script for NOR */
    #define CONFIG_SYS_LDSCRIPT "board/ti/am335x/u-boot.lds"

    /* Always 128 KiB env size */
    #define CONFIG_ENV_SIZE (128 << 10)

    /* Enhance our eMMC support / experience. */
    #define CONFIG_CMD_GPT
    #define CONFIG_EFI_PARTITION

    #ifdef CONFIG_NAND
    #define NANDARGS \
    "mtdids=" MTDIDS_DEFAULT "\0" \
    "mtdparts=" MTDPARTS_DEFAULT "\0" \
    "nandargs=setenv bootargs console=${console} " \
    "${optargs} " \
    "root=${nandroot} " \
    "rootfstype=${nandrootfstype}\0" \
    "nandroot=ubi0:rootfs rw ubi.mtd=9,2048\0" \
    "nandrootfstype=ubifs rootwait=1\0" \
    "nandboot=echo Booting from nand ...; " \
    "run nandargs; " \
    "nand read ${fdtaddr} u-boot-spl-os; " \
    "nand read ${loadaddr} kernel; " \
    "bootz ${loadaddr} - ${fdtaddr}\0"
    #else
    #define NANDARGS ""
    #endif

    #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG

    #ifndef CONFIG_SPL_BUILD
    #define CONFIG_EXTRA_ENV_SETTINGS \
    DEFAULT_LINUX_BOOT_ENV \
    "boot_fdt=try\0" \
    "bootpart=0:2\0" \
    "bootdir=/boot\0" \
    "bootfile=zImage\0" \
    "fdtfile=am335x-TIMEUNIT.dtb\0" \
    "console=ttyO0,115200n8\0" \
    "partitions=" \
    "uuid_disk=${uuid_gpt_disk};" \
    "name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}\0" \
    "optargs=\0" \
    "mmcdev=0\0" \
    "mmcroot=/dev/mmcblk0p2 ro\0" \
    "mmcrootfstype=ext4 rootwait\0" \
    "rootpath=/export/rootfs\0" \
    "nfsopts=nolock\0" \
    "static_ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}" \
    "::off\0" \
    "ramroot=/dev/ram0 rw\0" \
    "ramrootfstype=ext2\0" \
    "mmcargs=setenv bootargs console=${console} " \
    "${optargs} " \
    "root=${mmcroot} " \
    "rootfstype=${mmcrootfstype}\0" \
    "spiroot=/dev/mtdblock4 rw\0" \
    "spirootfstype=jffs2\0" \
    "spisrcaddr=0xe0000\0" \
    "spiimgsize=0x362000\0" \
    "spibusno=0\0" \
    "spiargs=setenv bootargs console=${console} " \
    "${optargs} " \
    "root=${spiroot} " \
    "rootfstype=${spirootfstype}\0" \
    "netargs=setenv bootargs console=${console} " \
    "${optargs} " \
    "root=/dev/nfs " \
    "nfsroot=${serverip}:${rootpath},${nfsopts} rw " \
    "ip=dhcp\0" \
    "bootenv=uEnv.txt\0" \
    "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \
    "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
    "source ${loadaddr}\0" \
    "loadbootenv=load mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
    "importbootenv=echo Importing environment from mmc ...; " \
    "env import -t -r $loadaddr $filesize\0" \
    "ramargs=setenv bootargs console=${console} " \
    "${optargs} " \
    "root=${ramroot} " \
    "rootfstype=${ramrootfstype}\0" \
    "loadramdisk=load mmc ${mmcdev} ${rdaddr} ramdisk.gz\0" \
    "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \
    "loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \
    "mmcloados=run mmcargs; " \
    "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
    "if run loadfdt; then " \
    "bootz ${loadaddr} - ${fdtaddr}; " \
    "else " \
    "if test ${boot_fdt} = try; then " \
    "bootz; " \
    "else " \
    "echo WARN: Cannot load the DT; " \
    "fi; " \
    "fi; " \
    "else " \
    "bootz; " \
    "fi;\0" \
    "mmcboot=mmc dev ${mmcdev}; " \
    "if mmc rescan; then " \
    "echo SD/MMC found on device ${mmcdev};" \
    "if run loadbootscript; then " \
    "run bootscript;" \
    "else " \
    "if run loadbootenv; then " \
    "echo Loaded environment from ${bootenv};" \
    "run importbootenv;" \
    "fi;" \
    "if test -n $uenvcmd; then " \
    "echo Running uenvcmd ...;" \
    "run uenvcmd;" \
    "fi;" \
    "if run loadimage; then " \
    "run mmcloados;" \
    "fi;" \
    "fi ;" \
    "fi;\0" \
    "spiboot=echo Booting from spi ...; " \
    "run spiargs; " \
    "sf probe ${spibusno}:0; " \
    "sf read ${loadaddr} ${spisrcaddr} ${spiimgsize}; " \
    "bootz ${loadaddr}\0" \
    "netboot=echo Booting from network ...; " \
    "setenv autoload no; " \
    "dhcp; " \
    "tftp ${loadaddr} ${bootfile}; " \
    "tftp ${fdtaddr} ${fdtfile}; " \
    "run netargs; " \
    "bootz ${loadaddr} - ${fdtaddr}\0" \
    "ramboot=echo Booting from ramdisk ...; " \
    "run ramargs; " \
    "bootz ${loadaddr} ${rdaddr} ${fdtaddr}\0" \
    NANDARGS \
    DFUARGS
    #endif

    #define CONFIG_BOOTCOMMAND \
    "run findfdt; " \
    "run mmcboot;" \
    "setenv mmcdev 1; " \
    "setenv bootpart 1:2; " \
    "run mmcboot;" \
    "run nandboot;"

    /* NS16550 Configuration */
    #define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */
    #define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */
    #define CONFIG_SYS_NS16550_COM3 0x48024000 /* UART2 */
    #define CONFIG_SYS_NS16550_COM4 0x481a6000 /* UART3 */
    #define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */
    #define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */
    #define CONFIG_BAUDRATE 115200

    #define CONFIG_CMD_EEPROM
    #define CONFIG_ENV_EEPROM_IS_ON_I2C
    #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */
    #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
    #define CONFIG_SYS_I2C_MULTI_EEPROMS

    /* PMIC support */
    #define CONFIG_POWER_TPS65217
    #define CONFIG_POWER_TPS65910

    /* SPL */
    #ifndef CONFIG_NOR_BOOT
    #define CONFIG_SPL_POWER_SUPPORT
    #define CONFIG_SPL_YMODEM_SUPPORT

    /* Bootcount using the RTC block */
    #define CONFIG_BOOTCOUNT_LIMIT
    #define CONFIG_BOOTCOUNT_AM33XX
    #define CONFIG_SYS_BOOTCOUNT_BE

    /* USB gadget RNDIS */
    #define CONFIG_SPL_MUSB_NEW_SUPPORT

    #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds"
    #endif

    #ifdef CONFIG_NAND
    /* NAND: device related configs */
    #define CONFIG_SYS_NAND_5_ADDR_CYCLE
    #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
    CONFIG_SYS_NAND_PAGE_SIZE)
    #define CONFIG_SYS_NAND_PAGE_SIZE 2048
    #define CONFIG_SYS_NAND_OOBSIZE 64
    #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
    /* NAND: driver related configs */
    #define CONFIG_NAND_OMAP_GPMC
    #define CONFIG_NAND_OMAP_ELM
    #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
    #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
    10, 11, 12, 13, 14, 15, 16, 17, \
    18, 19, 20, 21, 22, 23, 24, 25, \
    26, 27, 28, 29, 30, 31, 32, 33, \
    34, 35, 36, 37, 38, 39, 40, 41, \
    42, 43, 44, 45, 46, 47, 48, 49, \
    50, 51, 52, 53, 54, 55, 56, 57, }

    #define CONFIG_SYS_NAND_ECCSIZE 512
    #define CONFIG_SYS_NAND_ECCBYTES 14
    #define CONFIG_SYS_NAND_ONFI_DETECTION
    #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW
    #define MTDIDS_DEFAULT "nand0=nand.0"
    #define MTDPARTS_DEFAULT "mtdparts=nand.0:" \
    "128k(NAND.SPL)," \
    "128k(NAND.SPL.backup1)," \
    "128k(NAND.SPL.backup2)," \
    "128k(NAND.SPL.backup3)," \
    "256k(NAND.u-boot-spl-os)," \
    "1m(NAND.u-boot)," \
    "128k(NAND.u-boot-env)," \
    "128k(NAND.u-boot-env.backup1)," \
    "8m(NAND.kernel)," \
    "-(NAND.rootfs)"
    #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x000c0000
    #undef CONFIG_ENV_IS_NOWHERE
    #define CONFIG_ENV_IS_IN_NAND
    #define CONFIG_ENV_OFFSET 0x001c0000
    #define CONFIG_ENV_OFFSET_REDUND 0x001e0000
    #define CONFIG_SYS_ENV_SECT_SIZE CONFIG_SYS_NAND_BLOCK_SIZE
    /* NAND: SPL related configs */
    #ifdef CONFIG_SPL_NAND_SUPPORT
    #define CONFIG_SPL_NAND_AM33XX_BCH
    #endif
    #ifdef CONFIG_SPL_OS_BOOT
    #define CONFIG_CMD_SPL_NAND_OFS 0x00080000 /* os parameters */
    #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */
    #define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
    #endif
    #endif /* !CONFIG_NAND */

    /*
    * For NOR boot, we must set this to the start of where NOR is mapped
    * in memory.
    */
    #ifdef CONFIG_NOR_BOOT
    #define CONFIG_SYS_TEXT_BASE 0x08000000
    #endif

    /*
    * USB configuration. We enable MUSB support, both for host and for
    * gadget. We set USB0 as peripheral and USB1 as host, based on the
    * board schematic and physical port wired to each. Then for host we
    * add mass storage support and for gadget we add both RNDIS ethernet
    * and DFU.
    */
    #define CONFIG_USB_MUSB_DSPS
    #define CONFIG_ARCH_MISC_INIT
    #define CONFIG_MUSB_GADGET
    #define CONFIG_MUSB_PIO_ONLY
    #define CONFIG_MUSB_DISABLE_BULK_COMBINE_SPLIT
    #define CONFIG_USB_GADGET
    #define CONFIG_USBDOWNLOAD_GADGET
    #define CONFIG_USB_GADGET_DUALSPEED
    #define CONFIG_USB_GADGET_VBUS_DRAW 2
    #define CONFIG_MUSB_HOST
    #define CONFIG_AM335X_USB0
    #define CONFIG_AM335X_USB0_MODE MUSB_PERIPHERAL
    #define CONFIG_AM335X_USB1
    #define CONFIG_AM335X_USB1_MODE MUSB_HOST

    #ifdef CONFIG_MUSB_HOST
    #define CONFIG_CMD_USB
    #define CONFIG_USB_STORAGE
    #endif

    #ifdef CONFIG_MUSB_GADGET
    #define CONFIG_USB_ETHER
    #define CONFIG_USB_ETH_RNDIS
    #define CONFIG_USBNET_HOST_ADDR "de:ad:be:af:00:00"

    /* USB TI's IDs */
    #define CONFIG_G_DNL_VENDOR_NUM 0x0451
    #define CONFIG_G_DNL_PRODUCT_NUM 0xD022
    #define CONFIG_G_DNL_MANUFACTURER "Texas Instruments"
    #endif /* CONFIG_MUSB_GADGET */

    #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_USBETH_SUPPORT)
    /* disable host part of MUSB in SPL */
    #undef CONFIG_MUSB_HOST
    #endif

    /* USB Device Firmware Update support */
    #ifndef CONFIG_SPL_BUILD
    #define CONFIG_DFU_FUNCTION
    #define CONFIG_DFU_MMC
    #define CONFIG_CMD_DFU
    #define DFU_ALT_INFO_MMC \
    "dfu_alt_info_mmc=" \
    "boot part 0 1;" \
    "rootfs part 0 2;" \
    "MLO fat 0 1;" \
    "MLO.raw raw 0x100 0x100;" \
    "u-boot.img.raw raw 0x300 0x400;" \
    "spl-os-args.raw raw 0x80 0x80;" \
    "spl-os-image.raw raw 0x900 0x2000;" \
    "spl-os-args fat 0 1;" \
    "spl-os-image fat 0 1;" \
    "u-boot.img fat 0 1;" \
    "uEnv.txt fat 0 1\0"
    #ifdef CONFIG_NAND
    #define CONFIG_DFU_NAND
    #define DFU_ALT_INFO_NAND \
    "dfu_alt_info_nand=" \
    "SPL part 0 1;" \
    "SPL.backup1 part 0 2;" \
    "SPL.backup2 part 0 3;" \
    "SPL.backup3 part 0 4;" \
    "u-boot part 0 5;" \
    "u-boot-spl-os part 0 6;" \
    "kernel part 0 8;" \
    "rootfs part 0 9\0"
    #else
    #define DFU_ALT_INFO_NAND ""
    #endif
    #define CONFIG_DFU_RAM
    #define DFU_ALT_INFO_RAM \
    "dfu_alt_info_ram=" \
    "kernel ram 0x80200000 0xD80000;" \
    "fdt ram 0x80F80000 0x80000;" \
    "ramdisk ram 0x81000000 0x4000000\0"
    #define DFUARGS \
    "dfu_alt_info_emmc=rawemmc raw 0 3751936\0" \
    DFU_ALT_INFO_MMC \
    DFU_ALT_INFO_RAM \
    DFU_ALT_INFO_NAND
    #endif

    /*
    * Default to using SPI for environment, etc.
    * 0x000000 - 0x020000 : SPL (128KiB)
    * 0x020000 - 0x0A0000 : U-Boot (512KiB)
    * 0x0A0000 - 0x0BFFFF : First copy of U-Boot Environment (128KiB)
    * 0x0C0000 - 0x0DFFFF : Second copy of U-Boot Environment (128KiB)
    * 0x0E0000 - 0x442000 : Linux Kernel
    * 0x442000 - 0x800000 : Userland
    */
    #if defined(CONFIG_SPI_BOOT)
    /* SPL related */
    #undef CONFIG_SPL_OS_BOOT /* Not supported by existing map */
    #define CONFIG_SPL_SPI_SUPPORT
    #define CONFIG_SPL_SPI_FLASH_SUPPORT
    #define CONFIG_SPL_SPI_LOAD
    #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000

    #define CONFIG_ENV_IS_IN_SPI_FLASH
    #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
    #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
    #define CONFIG_ENV_SECT_SIZE (4 << 10) /* 4 KB sectors */
    #define CONFIG_ENV_OFFSET (768 << 10) /* 768 KiB in */
    #define CONFIG_ENV_OFFSET_REDUND (896 << 10) /* 896 KiB in */
    #define MTDIDS_DEFAULT "nor0=m25p80-flash.0"
    #define MTDPARTS_DEFAULT "mtdparts=m25p80-flash.0:128k(SPL)," \
    "512k(u-boot),128k(u-boot-env1)," \
    "128k(u-boot-env2),3464k(kernel)," \
    "-(rootfs)"
    #elif defined(CONFIG_EMMC_BOOT)
    #undef CONFIG_ENV_IS_NOWHERE
    #define CONFIG_ENV_IS_IN_MMC
    #define CONFIG_SPL_ENV_SUPPORT
    #define CONFIG_SYS_MMC_ENV_DEV 1
    #define CONFIG_SYS_MMC_ENV_PART 2
    #define CONFIG_ENV_OFFSET 0x0
    #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
    #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
    #endif

    /* SPI flash. */
    #define CONFIG_SPI_FLASH
    #define CONFIG_SPI_FLASH_BAR
    #define CONFIG_SPI_FLASH_SPANSION
    #define CONFIG_CMD_SF
    #define CONFIG_SF_DEFAULT_SPEED 48000000
    #define CONFIG_SF_DEFAULT_BUS 0
    #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0

    /* Network. */
    #define CONFIG_PHY_GIGE
    #define CONFIG_PHYLIB
    #define CONFIG_PHY_ADDR 2
    #define CONFIG_PHY_MICREL
    #define CONFIG_PHY_MICREL_KSZ9031
    #define CONFIG_PHY_RESET_DELAY 10000
    #define CONFIG_CPSW_SEARCH_PHY
    #define CONFIG_CPSW_SEARCH_PHY_MASK (1 << 2) // Search for phy ids 2 only

    /* Debug */
    /*#define DEBUG*/

    /* Unsupported features */
    #undef CONFIG_USE_IRQ
    #undef CONFIG_HW_WATCHDOG
    #undef CONFIG_OMAP_WATCHDOG
    #undef CONFIG_SPL_WATCHDOG_SUPPORT

    /*
    * NOR Size = 16 MiB
    * Number of Sectors/Blocks = 128
    * Sector Size = 128 KiB
    * Word length = 16 bits
    * Default layout:
    * 0x000000 - 0x07FFFF : U-Boot (512 KiB)
    * 0x080000 - 0x09FFFF : First copy of U-Boot Environment (128 KiB)
    * 0x0A0000 - 0x0BFFFF : Second copy of U-Boot Environment (128 KiB)
    * 0x0C0000 - 0x4BFFFF : Linux Kernel (4 MiB)
    * 0x4C0000 - 0xFFFFFF : Userland (11 MiB + 256 KiB)
    */
    #if defined(CONFIG_NOR)
    #undef CONFIG_SYS_NO_FLASH
    #define CONFIG_CMD_FLASH
    #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
    #define CONFIG_SYS_FLASH_PROTECTION
    #define CONFIG_SYS_FLASH_CFI
    #define CONFIG_FLASH_CFI_DRIVER
    #define CONFIG_FLASH_CFI_MTD
    #define CONFIG_SYS_MAX_FLASH_SECT 128
    #define CONFIG_SYS_MAX_FLASH_BANKS 1
    #define CONFIG_SYS_FLASH_BASE (0x08000000)
    #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
    #define CONFIG_SYS_FLASH_SIZE 0x01000000
    #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
    /* Reduce SPL size by removing unlikey targets */
    #ifdef CONFIG_NOR_BOOT
    #define CONFIG_ENV_IS_IN_FLASH
    #define CONFIG_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
    #define CONFIG_ENV_OFFSET (512 << 10) /* 512 KiB */
    #define CONFIG_ENV_OFFSET_REDUND (768 << 10) /* 768 KiB */
    #define MTDIDS_DEFAULT "nor0=physmap-flash.0"
    #define MTDPARTS_DEFAULT "mtdparts=physmap-flash.0:" \
    "512k(u-boot)," \
    "128k(u-boot-env1)," \
    "128k(u-boot-env2)," \
    "4m(kernel),-(rootfs)"
    #endif
    #endif /* NOR support */

    #endif /* ! __CONFIG_AM335X_EVM_H */



    Best Regards,
    thanks for replying,
    Francesco.
  • I found that the problem can be that SPL use other functions with respect to U-boot to read the SPI.
    In fact inside U-boot booted from UART we can use correctly the commands sf probe, erase, write and read.
    Can anyone explain to us how we can use these functions directly into U-boot code to read from SPI flash?

    Thanks,
    Francesco.
  • We tried the solution cited above without results.
    The question now is: Can we use S25FL512S on AM335x with U-boot?

    Thanks in advance,
    Francesco.
  • Hi Francesco,

    I checked your config header (am335x_evm.h) and it seems ok.

    As for
    Francesco Tosoratti said:
    Can we use S25FL512S on AM335x with U-boot?

    At first glance of S25FL512S datasheet, I don't see a reason not to use that SPI NOR flash.

    What I can suggest is add #define DEBUG in u-boot/drivers/mtd/spi/sf.c, u-boot/drivers/mtd/spi/sf_ops.c, u-boot/drivers/mtd/spi/sf_probe.c to enable all sf debug messages. This may give you some hints on what is going wrong with your setup.

    Also check the configurations of your S25FL512S in u-boot/drivers/mtd/spi/sf_params.c & included header files in it regarding your spi flash. The #ifdef CONFIG_SPI_FLASH_SPANSION /* SPANSION */ section of the code.

    Hope this helps.

    Best Regards,
    Yordan
  • Hi Jordan,
    I solved partially our problem. By using a multimeter I found that during SPL, two chipselects were selected at the same time creating conflicts and error during loading the u-boot from SPI flash.
    Therefore, in the file /board/ti/am335x/mux.c, I changed the pin muxing for the pin:

    static struct module_pin_mux spi0_pin_mux[] = {
    {OFFSET(spi0_sclk), (MODE(0) | RXACTIVE | PULLUDEN)}, /* SPI0_SCLK */
    {OFFSET(spi0_d0), (MODE(0) | RXACTIVE |
    PULLUDEN | PULLUP_EN)}, /* SPI0_D0 */
    {OFFSET(spi0_d1), (MODE(0) | RXACTIVE | PULLUDEN)}, /* SPI0_D1 */
    {OFFSET(spi0_cs0), (MODE(0) | RXACTIVE |
    PULLUDEN | PULLUP_EN)}, /* SPI0_CS0 */
    {OFFSET(spi0_cs1), (MODE(7) | RXACTIVE |
    PULLUDEN | PULLUP_EN)}, /* SPI0_CS1 - configured as GPIO*/
    {OFFSET(mcasp0_fsr), (MODE(7) | RXACTIVE |
    PULLUDEN | PULLUP_EN)}, /* SPI0_GPIO_CS3n */
    {OFFSET(mcasp0_axr1), (MODE(7) | RXACTIVE |
    PULLUDEN | PULLUP_EN)}, /* SPI0_GPIO_CS2n */
    {-1},
    };

    Now, because in addition to kernel and U-boot, we have to write a jffs2 filesystem to flash,
    Can you please explain to us, how we can use gpios where we connected other chipselects for SPI?

    Thanks in advance,
    Francesco.