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SPI0 D0 as output (using EVM AM335X)

sergios
Prodigy 95 points

Hi all

I'm wondering how to use spi0_d0 as MOSI. I just change on kernel & u-boot mux data but it seems not enough. I've read some messages in this forum e2e.ti.com/.../1466442 and it seems necessary to change mcspi_syst register and spidatdir0 value according to my config.

If this is correct, where in the kernel or u-boot I've to update this config?

Some "push" on the right direction will be very appreciated!

Sergios

  • 0
    TI__Guru**** 393215 points

    Hi Sergios,

    I will forward this to the SW team.

  • 0
    TI__Guru**** 161600 points

    Hi Sergios,

    Which SDK are you using?

    For SDK7.0 & SDK8.0 generally to configure D0/D1 pins as input or output, you need to modify the device tree node.

    See Documentation/bindings/devicetree/spi/omap-spi.txt:

     ti,pindir-d0-out-d1-in:  Select the D0 pin as output and D1 as input. The default is D0 as input and D1 as output.

    You need to add this line (ti,pindir-d0-out-d1-in) in the spi0: spi@48030000 or spi1: spi@481a0000 node in am33xx.dtsi.  You also need to enable the spi in your specific dts file (am335x-evm.dts for AM335x GP EVM; am335x-evmsk.dts for AM335x Starter Kit; am335x-boneblack.dts for BeagleBone Black, etc..):

    &spi0 {

              pinctrl-names = "default";

              pinctrl-0 = <&spi0_pins>;                  //or whatever your pinmux structure is called

              status = "okay";

    };

    Hope this helps.

    Best Regards,

    Yordan

  • 0 in reply to Yordan Kovachev
    Prodigy 95 points
    Hi Yordan

    Your support it's very appreciated

    I'm using SDK 6.0 (because we've lot of stuff currently working with it and it's hard to move to 7.0/8.0)

    For those with same problem, If there are somebody :-), I've ported D0/D1 directorio feature from 3.19 to 3.2 kernel. As I want to configure spi0_d0 as output:
    original function here: lxr.free-electrons.com/.../spi-omap2-mcspi.c


    static inline void mcspi_write_chconf0(const struct spi_device *spi, u32 val)
    {
    struct omap2_mcspi_cs *cs = spi->controller_state;

    // ................................................................................................
    if (spi->master->bus_num==1) // bus_num=1 => spi0
    { // spi0_d0 as output
    val |= OMAP2_MCSPI_CHCONF_IS;
    val &= ~OMAP2_MCSPI_CHCONF_DPE0;
    }
    // ................................................................................................



    cs->chconf0 = val;

    mcspi_write_cs_reg(spi, OMAP2_MCSPI_CHCONF0, val);
    mcspi_read_cs_reg(spi, OMAP2_MCSPI_CHCONF0);
    }