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AM437x based board: Problem enabling both eMMC and SD/MMC simultaneously

Prashanth Krishna
Prodigy 110 points
Other Parts Discussed in Thread: AM4372, TPS63031, TPS65218

We are using a AM437x based board with the following connections:

MMC0 -> connected to eMMC

MMC1 -> connected to SD/MMC

we have configured the pinmux in the DTS file accordingly as below:

mmc2_pins: pinmux_mmc2_pins {
pinctrl-single,pins = <
0x080 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk make relevant changes for mmc1*/
0x084 (PIN_INPUT_PULLUP | MUX_MODE2) /* Micro_SD -> gpmc_csn2.mmc1_cmd -> F10 */
0x020 (PIN_INPUT_PULLUP | MUX_MODE2) /* Micro_SD -> gpmc_ad8.mmc1_dat0 -> B10 */
0x024 (PIN_INPUT_PULLUP | MUX_MODE2) /* Micro_SD -> gpmc_ad9.mmc1_dat1 -> A10 */
0x028 (PIN_INPUT_PULLUP | MUX_MODE2) /* Micro_SD -> gpmc_ad10.mmc1_dat2 -> F11 */
0x02C (PIN_INPUT_PULLUP | MUX_MODE2) /* Micro_SD -> gpmc_ad11.mmc1_dat3 -> D11 */
0x070 (PIN_INPUT | MUX_MODE7) /* Micro_SD -> mmc1_sdcd -> A2 */
>;
};

emmc_pins: pinmux_emmc_pins {
pinctrl-single,pins = <

0x100 (PIN_INPUT_PULLUP | MUX_MODE2) /* eMMC -> mmc0_clk -> D1*/
0x104 (PIN_INPUT_PULLUP | MUX_MODE2) /* eMMC -> mmc0_cmd -> D2*/
0x0FC (PIN_INPUT_PULLUP | MUX_MODE2) /* eMMC -> mmc0_dat0 -> C1*/
0x0F8 (PIN_INPUT_PULLUP | MUX_MODE2) /* eMMC -> mmc0_dat1 -> C2*/
0x0F4 (PIN_INPUT_PULLUP | MUX_MODE1) /* eMMC -> mmc0_dat2 -> B2*/
0x0F0 (PIN_INPUT_PULLUP | MUX_MODE1) /* eMMC -> mmc0_dat3 -> B1*/
0x138 (PIN_INPUT_PULLUP| MUX_MODE3) /* eMMC -> mmc0_dat4 -> E16*/
0x134 (PIN_INPUT_PULLUP| MUX_MODE3) /* eMMC -> mmc0_dat5 -> C14 */
0x130 (PIN_INPUT_PULLUP | MUX_MODE3) /* eMMC ->mmc0_dat6 -> D13*/
0x12C (PIN_INPUT_PULLUP | MUX_MODE3) /*eMMC -> mmc0_dat7 -> D14*/
>;
};

With the above setting, we are expecting to get both MMC0 and MMC1 device nodes to be avilable as eMMC and SD/MMC.

But, we are only able to see the entries /dev/mmcblk0p1 and /dev/mmcblk0p2, which corresponds to the SD/MMC device. And, we are not able to see the device node getting created for eMMC.

Note: In u-boot, if we do a mmcscan, both the mmc adapters mmc0 and mmc1 are seen. But in kernel, we are only able to see MMC0 device.

Could anyone give inputs on this issue ?

  • 0
    TI__Guru**** 393215 points

    Hi,

    Is your eMMC partitioned and formatted?

  • 0 in reply to Biser Gatchev-XID
    Prodigy 110 points
    Hi Biser,

    Thanks for the reply.
    eMMC is not formatted/partitioned. But, we are expecting the device node to be created. i.e. /dev/mmcblk1, which is not happening. If we are able to get this device node, we can do the formatting and partitioning.
  • 0 in reply to Prashanth Krishna
    TI__Guru**** 393215 points

    Another thing to check is that the eMMC is not held in Reset.

  • 0 in reply to Biser Gatchev-XID
    Prodigy 110 points

    Hi Biser,

    In our board, the eMMC RESET line is directly connected to the CPU_RESET. So, the eMMC reset happens during the system bootup itself.

     

  • 0 in reply to Prashanth Krishna
    Prodigy 110 points

    Hi All,

    We are still facing this issue of eMMC not getting detected in the kernel. Can anyone provide further inputs on this issue ?

     

  • 0 in reply to Prashanth Krishna
    TI__Genius 15510 points

    What does your device tree entry look like. The eMMC is detected on a Beaglebone Black (AM335x not AM437x, but the same controller and software). Do you have

    ti,non-removable

    In the tree? This is what BBB has (but eMMC is on mmc1)

     &mmc2 {
             vmmc-supply = <&vmmcsd_fixed>;
             pinctrl-names = "default";
             pinctrl-0 = <&emmc_pins>;
             bus-width = <8>;
             ti,non-removable;
             status = "okay";
     };

    Steve K.

  • 0 in reply to Steve Kipisz
    Prodigy 110 points

    Hi Steve,

     

    Thanks for the reply.

    In our board, eMMC is connected to MMC1 and SD card is connected to MMC2.

    Also, we have ti,non-removable in the device tree for EMMC as shown below:

    &mmc1 {
     status = "okay";
     vmmc-supply = <&vmmcsd_fixed>;
     bus-width = <8>;
     ti,non-removable;
     pinctrl-names = "default";
     pinctrl-0 = <&emmc_pins>;
      pinctrl-1 = <&emmc_pins_sleep>;
    };

    Kindly find the complete dts file which we are using:

     

    /*

    * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/

    *

    * This program is free software; you can redistribute it and/or modify

    * it under the terms of the GNU General Public License version 2 as

    * published by the Free Software Foundation.

    */

     

    /* AM437x GP EVM */

     

    /dts-v1/;

     

    #include "am43x-common-evm.dtsi"

    #include <dt-bindings/pinctrl/am43xx.h>

    #include <dt-bindings/pwm/pwm.h>

     

    / {

                    model = "TI AM437x gp EVM";

                    compatible = "ti,am437x-gp-evm","ti,am4372","ti,am43";

     

                    vmmcsd_fixed: fixedregulator-sd {

                                    compatible = "regulator-fixed";

                                    regulator-name = "vmmcsd_fixed";

                                    regulator-min-microvolt = <3300000>;

                                    regulator-max-microvolt = <3300000>;

                                    enable-active-high;

                    };

     

                    evm_v3p3: tps63031 {

                                    compatible = "regulator-fixed";

                                    regulator-name = "evm_v3p3";

                                    regulator-min-microvolt = <3300000>;

                                    regulator-max-microvolt = <3300000>;

                    };

     

                     cpus {

                                    cpu@0 {

                                                    cpu0-supply = <&dcdc2>;

                                    };

                    };

    };

     

     

     

    &am43xx_pinmux {

                    pinctrl-names = "default";

                    pinctrl-0 = <&clkout2_pin >;

                    /* pinctrl-0 = <&clkout2_pin &ddr3_vtt_toggle_default>; */

                    /* GHpcbchng : GH uses rgmii2 */

                    cpsw_default: cpsw_default {

                                    pinctrl-single,pins = <

                                                    /* Slave 1 */

                                                    0x040 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)         /* rgmii2_tctl */

                                                    0x044 (PIN_INPUT_PULLDOWN | MUX_MODE2)              /* rgmii2_rxctl */

                                                    0x048 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)         /* rgmii2_txd3 */

                                                    0x04C (PIN_OUTPUT_PULLDOWN | MUX_MODE2)         /* rgmii2_txd2 */

                                                    0x050 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)         /* rgmii2_txd1 */

                                                    0x054 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)         /* rgmii2_txd0 */

                                                    0x058 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)         /* rmii2_tclk */

                                                    0x05C (PIN_INPUT_PULLDOWN | MUX_MODE2)             /* rmii2_rclk */

                                                    0x060 (PIN_INPUT_PULLDOWN | MUX_MODE2)              /* rgmii2_rxd3 */

                                                    0x064 (PIN_INPUT_PULLDOWN | MUX_MODE2)              /*rgmii2_rxd2 */

                                                    0x068 (PIN_INPUT_PULLDOWN | MUX_MODE2)              /* rgmii2_rxd1 */

                                                    0x06C (PIN_INPUT_PULLDOWN | MUX_MODE2)             /* rgmii2_rxd0 */

                                    >;

                    };

                    cpsw_sleep: cpsw_sleep {

                                    pinctrl-single,pins = <

                                                    /* Slave 1 reset value */

                                                    0x040 (PIN_INPUT_PULLDOWN | MUX_MODE7)

                                                    0x044 (PIN_INPUT_PULLDOWN | MUX_MODE7)

                                                    0x048 (PIN_INPUT_PULLDOWN | MUX_MODE7)

                                                    0x04C (PIN_INPUT_PULLDOWN | MUX_MODE7)

                                                    0x050 (PIN_INPUT_PULLDOWN | MUX_MODE7)

                                                    0x054 (PIN_INPUT_PULLDOWN | MUX_MODE7)

                                                    0x058 (PIN_INPUT_PULLDOWN | MUX_MODE7)

                                                    0x05C (PIN_INPUT_PULLDOWN | MUX_MODE7)

                                                    0x060 (PIN_INPUT_PULLDOWN | MUX_MODE7)

                                                    0x064 (PIN_INPUT_PULLDOWN | MUX_MODE7)

                                                    0x068 (PIN_INPUT_PULLDOWN | MUX_MODE7)

                                                    0x06C (PIN_INPUT_PULLDOWN | MUX_MODE7)

                                    >;

                    };

     

                    davinci_mdio_default: davinci_mdio_default {

                                    pinctrl-single,pins = <

                                                    /* MDIO */

                                                    0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)/* mdio_data.mdio_data */

                                                    0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0)                                  /* mdio_clk.mdio_clk */

                                    >;

                    };

     

                    davinci_mdio_sleep: davinci_mdio_sleep {

                                    pinctrl-single,pins = <

                                                    /* MDIO reset value */

                                                    0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)

                                                    0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)

                                    >;

                    };

    /* configuration for sd/mmc */

                    mmc2_pins: pinmux_mmc2_pins {

                                    pinctrl-single,pins = <

                                                    0x080 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk make relevant changes for mmc1*/

                                                    0x084 (PIN_INPUT_PULLUP | MUX_MODE2) /* Micro_SD -> gpmc_csn2.mmc1_cmd -> F10 */

                                                    0x020 (PIN_INPUT_PULLUP | MUX_MODE2) /* Micro_SD -> gpmc_ad8.mmc1_dat0 -> B10 */

                                                    0x024 (PIN_INPUT_PULLUP | MUX_MODE2) /* Micro_SD -> gpmc_ad9.mmc1_dat1 -> A10 */

                                                    0x028 (PIN_INPUT_PULLUP | MUX_MODE2) /* Micro_SD -> gpmc_ad10.mmc1_dat2 -> F11 */

                                                    0x02C (PIN_INPUT_PULLUP | MUX_MODE2) /* Micro_SD -> gpmc_ad11.mmc1_dat3 -> D11 */

                                                    0x070 (PIN_INPUT | MUX_MODE7)                        /* Micro_SD -> mmc1_sdcd -> A2 */

                                    >;

                    };

     

                    mmc2_sleep_pins: pinmux_mmc2_sleep_pins {

                                    pinctrl-single,pins = <

                                                    0x080 (PIN_INPUT | MUX_MODE2) /* gpmc_csn1.mmc1_clk make relevant changes for mmc1*/

                                                    0x084 (PIN_INPUT | MUX_MODE2) /* Micro_SD -> mmc1_cmd -> F10 */

                                                    0x020 (PIN_INPUT | MUX_MODE2) /* Micro_SD -> mmc1_dat0 -> B10 */

                                                    0x024 (PIN_INPUT | MUX_MODE2) /* Micro_SD -> mmc1_dat1 -> A10 */

                                                    0x028 (PIN_INPUT | MUX_MODE2) /* Micro_SD -> mmc1_dat2 -> F11 */

                                                    0x02C (PIN_INPUT | MUX_MODE2) /* Micro_SD -> mmc1_dat3 -> D11 */

                                    >;

                    };

     

                    /* emmc 8 data line */

                    emmc_pins: pinmux_emmc_pins {

                                    pinctrl-single,pins = <

                                                   

                                                    0x100 (PIN_INPUT_PULLUP | MUX_MODE2) /* eMMC -> mmc0_clk -> D1*/

                                                    0x104 (PIN_INPUT_PULLUP | MUX_MODE2) /* eMMC -> mmc0_cmd -> D2*/

                                                    0x0FC (PIN_INPUT_PULLUP | MUX_MODE2) /* eMMC -> mmc0_dat0 -> C1*/

                                                    0x0F8 (PIN_INPUT_PULLUP | MUX_MODE2) /* eMMC -> mmc0_dat1 -> C2*/

                                                    0x0F4 (PIN_INPUT_PULLUP | MUX_MODE1) /* eMMC -> mmc0_dat2 -> B2*/

                                                    0x0F0 (PIN_INPUT_PULLUP | MUX_MODE1) /* eMMC -> mmc0_dat3 -> B1*/

                                                    0x138 (PIN_INPUT_PULLUP| MUX_MODE3) /* eMMC -> mmc0_dat4 -> E16*/

                                                    0x134 (PIN_INPUT_PULLUP| MUX_MODE3) /* eMMC -> mmc0_dat5 -> C14 */

                                                    0x130 (PIN_INPUT_PULLUP | MUX_MODE3) /* eMMC ->mmc0_dat6 -> D13*/

                                                    0x12C (PIN_INPUT_PULLUP | MUX_MODE3) /*eMMC -> mmc0_dat7 -> D14*/

                                    >;

                    };

     

           emmc_pins_sleep: emmc_pins_sleep {

                   pinctrl-single,pins = <

                          0x00 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad0.gpio1_0 */

                           0x04 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad1.gpio1_1 */

                           0x08 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad2.gpio1_2 */

                            0x0c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad3.gpio1_3 */

                           0x10 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad4.gpio1_4 */

                           0x14 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad5.gpio1_5 */

                          0x18 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad6.gpio1_6 */

                           0x1c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad7.gpio1_7 */

                           0x80 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn1.gpio1_30 */

                            0x84 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn2.gpio1_31 */

                   >;

           };

     

     

     

                    i2c0_pins: pinmux_i2c0_pins {

                                    pinctrl-single,pins = <

                                                    0x188 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)   /* i2c0_sda.i2c0_sda */

                                                    0x18c (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)   /* i2c0_scl.i2c0_scl */

                                    >;

                    };

     

                    i2c1_pins: i2c1_pins {

                                    pinctrl-single,pins = <

                                                    0x15c   (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2) /* spi0_cs0.i2c1_scl */

                                                    0x158   (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2) /* spi0_d1.i2c1_sda */

                                    >;

                    };

     

                    clkout2_pin: clkout2_pin {

                                    pinctrl-single,pins = <

                                                    0x274 (PIN_OUTPUT_PULLUP | MUX_MODE3)

                                    >;

                    };

                    /*Removed dcan0_default/dcan1_default from GH dts*/

                    /*Removed mcasp1 */

                    /*Removed nand_flash_x8 from GH dts a we are not using nand*/

                    uart0_pins: uart0_pins {

                                    pinctrl-single,pins = <

                                                    0x170 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart0_rxd.uart0_rxd */

                                                    0x174 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart0_txd.uart0_txd */

                                    >;

                    };

     

    };

      

    &i2c0 {

           status = "okay";

           pinctrl-names = "default";

           pinctrl-0 = <&i2c0_pins>;

                    clock-frequency = <100000>;

     

                    /* Set OPP50 (0.95V) for VDD MPU and core */

                    sleep-sequence = /bits/ 8 <

                                    0x02 0x24 0x10 0x6b /* Password unlock 1 */

                                    0x02 0x24 0x16 0x8A /* Set DCDC1 (Core) to 0.95V */

                                    0x02 0x24 0x10 0x67 /* Password unlock 3 */

                                    0x02 0x24 0x1A 0x86 /* Apply DCDC changes */

                    >;

     

                    /* Set OPP100 (1.10V) for VDD core */

                    wake-sequence = /bits/ 8 <

                                    0x02 0x24 0x10 0x6B /* Password unlock 2 */

                                    0x02 0x24 0x16 0x99 /* Set DCDC1 (Core) to 1.1V */

                                    0x02 0x24 0x10 0x67 /* Password unlock 3 */

                                    0x02 0x24 0x1A 0x86 /* Apply DCDC changes */

                    >;

     

                    tps65218: tps65218@24 {

                                    reg = <0x24>;

                                    compatible = "ti,tps65218";

                                    interrupts = <GIC_SPI 7 IRQ_TYPE_NONE>; /* NMIn */

                                    interrupt-parent = <&gic>;

                                    interrupt-controller;

                                    #interrupt-cells = <2>;

     

                                    dcdc1: regulator-dcdc1 {

                                                    compatible = "ti,tps65218-dcdc1";

                                                    /* VDD_CORE voltage limits min of OPP50 and max of OPP100 */

                                                    regulator-name = "vdd_core";

                                                    regulator-min-microvolt = <912000>;

                                                    regulator-max-microvolt = <1144000>;

                                                    regulator-boot-on;

                                                    regulator-always-on;

                                    };

     

                                    dcdc2: regulator-dcdc2 {

                                                    compatible = "ti,tps65218-dcdc2";

                                                    /* VDD_MPU voltage limits min of OPP50 and max of OPP_NITRO */

                                                    regulator-name = "vdd_mpu";

                                                    regulator-min-microvolt = <912000>;

                                                    regulator-max-microvolt = <1378000>;

                                                    regulator-boot-on;

                                                    regulator-always-on;

                                    };

     

                                    dcdc3: regulator-dcdc3 {

                                                    compatible = "ti,tps65218-dcdc3";

                                    };

     

                                    ldo1: regulator-ldo1 {

                                                    compatible = "ti,tps65218-ldo1";

                                                    regulator-min-microvolt = <1800000>;

                                                    regulator-max-microvolt = <1800000>;

                                                    regulator-boot-on;

                                                    regulator-always-on;

                                    };

                    };

    };

     

     

    &gpio0 {

                    status = "okay";

    };

     

    &gpio3 {

                    status = "okay";

    };

     

    &gpio4 {

                    status = "okay";

    };

     

    &gpio5 {

                    status = "okay";

                    ti,no-reset;

    };

     

     

    &mac {

                    slaves = <1>;

                    pinctrl-names = "default", "sleep";

                    pinctrl-0 = <&cpsw_default>;

                    pinctrl-1 = <&cpsw_sleep>;

                    status = "okay";

    };

     

    &davinci_mdio {

                    pinctrl-names = "default", "sleep";

                    pinctrl-0 = <&davinci_mdio_default>;

                    pinctrl-1 = <&davinci_mdio_sleep>;

                    status = "okay";

    };

     

    &cpsw_emac0 {

                    phy_id = <&davinci_mdio>, <0>;

                    phy-mode = "rgmii";

    };

     

    &mmc2 {

                    status = "okay";

                    vmmc-supply = <&vmmcsd_fixed>;

                    bus-width = <4>;

                    pinctrl-names = "default", "sleep";

                    pinctrl-0 = <&mmc2_pins>;

                    pinctrl-1 = <&mmc2_sleep_pins>;

                    broken-cd;

                    /* cd-gpios = <&gpio5 30 GPIO_ACTIVE_HIGH>; */

    };

     

    &mmc1 {

                    status = "okay";

                    vmmc-supply = <&vmmcsd_fixed>;

                    bus-width = <8>;

                    ti,non-removable;

                    pinctrl-names = "default";

                    pinctrl-0 = <&emmc_pins>;

           pinctrl-1 = <&emmc_pins_sleep>;

    };

     

    &i2c0 {

           status = "okay";

           pinctrl-names = "default";

           pinctrl-0 = <&i2c0_pins>;

     

    };

     

     

    &elm {

                    status = "okay";

    };

     

    &uart0 {

                    status = "okay";

                    pinctrl-names = "default";

                    pinctrl-0 = <&uart0_pins>;

    };

     

     

    &clkout_32k_mux_ck {

                    clock-default = <&clk_32768_ck>;

    };

     

    &wkup_m3 {

                    ti,set-io-isolation;

    };

      

    Regards,

    Prashanth