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PCIe INTA ISR not clearing



I am now able to get an INTA event to occur (refer to e2e.ti.com/.../415021), but I cannot create a second one.

My ISR is here.

void INTA_Event_isr(UArg arg)
{
Hwi_disable();
CpIntc_disableAllHostInts(0); //disable system interrupts
/* Clear the CIC0 system interrupt */
CpIntc_clearSysInt(0, 50); //clear interrupt event
//breakpoint is here; waiting for interrupt
Event_Transfer_Done = TRUE;

//enable PCIe INTa interrupt
*((uint32_t *)(0x21800000 + 0x184)) = 0x00000001; //LEGACY_A_IRQ_STATUS write to clear
*((uint32_t *)(0x21800000 + 0x18C)) = 0x00000001; //LEGACY_A_IRQ_ENABLE_CLR
*((uint32_t *)(0x21800000 + 0x188)) = 0x00000001; //LEGACY_A_IRQ_ENABLE_SET

*((uint32_t *)(0x02600284)) = 0x00040000; //Clear INTC0 event
*((uint32_t *)(0x21800000 + 0x50)) = 0x00000000; //clear inta event

CpIntc_enableAllHostInts(0);
Hwi_enable();
DMA_Transfer_Done = TRUE;

}

"CpIntc_clearSysInt(0, 50); //clear interrupt event" shouldn't be required, as the CIC should handle this.  It is also redundant with the line: "*((uint32_t *)(0x02600284)) = 0x00040000; //Clear INTC0 event"

I also don't think it's necessary to disable/renable the INTA interrupt.  I've only done these in an attempt to get the system to reset.  For whatever reason, I can basically "one-shot" the system, but I cannot clear the flags and get the ISR to retrigger.

Any ideas to fix this would be appreciated.

Thanks

JW

  • Hi,

    Have you try to configure multiple interrupt on your test code?

    Your code is not clear. Please take a look at below MCSDK interrupt code to configure the multiple interrupt.
    Path: "\ti\pdk_C6678_1_1_2_6\packages\ti\csl\example\cpintc\cpintc_test.c

    Thanks,
  • That example uses CSL and not SYS/BIOS, but otherwise I think I've followed it fairly close.

    I'm not sure what isn't clear about my ISR code, but I'll PseudoCode it here:


    void INTA_Event_isr(UArg arg)
    {
    Disable_HWI_System(); //Hwi_disable(); //using TI library function
    Disable_SystemInterrupts(); //CpIntc_disableAllHostInts(0); TI library function, to prevent another interrupt from occuring
    Clear_SecondaryEvent(50); //CpIntc_clearSysInt(0, 50); //TI library function, clear event 50, acknowledging it has been handled.

    SetFlag(Event_Transfer_Done ,TRUE); //indicate to rest of system event has occured

    Clear_PCIe_INTA(); //*((uint32_t *)(0x21800000 + 0x184)) = 0x00000001; //LEGACY_A_IRQ_STATUS write to clear
    Disable_PCIe_INTA(); //*((uint32_t *)(0x21800000 + 0x18C)) = 0x00000001; //LEGACY_A_IRQ_ENABLE_CLR
    Enable_PCIe_INTA(); //*((uint32_t *)(0x21800000 + 0x188)) = 0x00000001; //LEGACY_A_IRQ_ENABLE_SET

    Clear_INTC_Event50(); //*((uint32_t *)(0x02600284)) = 0x00040000; //Clear INTC0 event
    SetEOI(); //*((uint32_t *)(0x21800000 + 0x50)) = 0x00000000; //clear inta event using EOI register

    Enable_SystemInterrupts(); //CpIntc_enableAllHostInts(0); // TI library function, Enable System Interrupts
    Disable_HWI_System(); //Hwi_enable(); //using TI library function renable HWI system

    SetFlag(DMA_Transfer_Done,TRUE); //indicate to rest of INTA event has occured and been handled

    }

    This follows the example, and the ISR flow in Section 1.3.6 of the CIC user manual. This is for a PCIe INTA event, so the event occurs, I stop the HWI system, stop the Event handler (CIC), handle the PCIe event, and then re-enable everything. But obviously I am missing something, as I can only do this once and cannot handle another INTA event.