Dear All,
I've a question about configuring C6748's SPI Controller as SPI Slave. The desired SPI protocol is similar to the one used in ordinary SPI Flash. In such protocol the SPI /CS signal remain asserted (Lo) during the command, address, write/read data phases. As an example, you can check the timing diagram in P. 25 Figure 7 of the following datasheet of some SPI Flash:
www.winbond.com/.../da00-w25x40cva1.pdf
I'm wondering whether it is possible to use C6748's SPI Port to implement an SPI Slave supporting SPI-Flash-like protocol?
Regards,
Oliver