C6670 PCIe MSI goes off twice per trigger

Hello,

I am working on the system with C6670 DSP and Spartan 6 FPGA connected over PCIe. DSP is running RC, while FPGA is operating EP.

I am trying to setup MSI handling. On this forum I have picked up example of RC setup to handle MSI and self trigger code. That worked for me, but somehow it appeared that HWI ISR was fired twice per trigger (self trigger actually). Next I have tried to send actual MSI from PGA to DSP. It worked, but again HWI ISR was fired twice per trigger.

I have seen similar thread at http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/t/209655.

var hwi0Params = new Hwi.Params();
hwi0Params.instance.name = "hwi_pcie";
hwi0Params.enableInt = true;
hwi0Params.eventId = 17;
Program.global.hwi_pcie = Hwi.create(13, "&pcie_isr", hwi0Params);

It looked strange to me, that there was no masking option added to the script. So if graphic configurator people are looking here, please file bug report as well. Then I selected masking option forth and back and masking option get added to cfg as follows:

hwi0Params.maskSetting = xdc.module("ti.sysbios.interfaces.IHwi").MaskingOption_SELF;

However, that did not help with ISR being fired twice. The ISR code is below:

volatile int intr_cnt = 0;

void pcie_isr(void)
{
    pcieRegisters_t setRegs;
    pcieMsiIrqStatusReg_t msiIrqStatus[1];
    pcieIrqEOIReg_t irqEOI;

    memset(&irqEOI, 0, sizeof(irqEOI));
    memset(&setRegs, 0, sizeof(setRegs));
    memset(&msiIrqStatus, 0, sizeof(msiIrqStatus));

    msiIrqStatus[0].msiIrqStatus = 0x1;
    irqEOI.EOI = 0x4;

    setRegs.msiIrqStatus[0] = &msiIrqStatus[0];
    setRegs.irqEOI = &irqEOI;
    if ( pcie_RET_OK != Pcie_writeRegs(handle, pcie_LOCATION_LOCAL, &setRegs) )
    {
        System_printf("Resetting interrupt registers failed!\n");
        return;
    }

    Log_print1(Diags_USER1, "pcie_isr cnt = %d", intr_cnt++);
    return;
}

With above ISR I see in printf log

16472522005,C66xx_0,pcie_isr cnt = 0,printf,Main Logger,,
16472525539,C66xx_0,pcie_isr cnt = 1,printf,Main Logger,,

on just single trigger from FPGA. However, if I avoid LLD calls and use pure CSL as follows:

volatile int intr_cnt = 0;

#include <ti/csl/cslr_pciess_app.h>
volatile CSL_Pciess_appRegs * const the_pciessAppRegisters = (volatile CSL_Pciess_appRegs *)CSL_PCIE_CONFIG_REGS;

void pcie_isr(void)
{

    the_pciessAppRegisters->MSIX_IRQ[0].MSI_IRQ_STATUS = 0x1;
    the_pciessAppRegisters->IRQ_EOI = 0x4;

    Log_print1(Diags_USER1, "pcie_isr cnt = %d", intr_cnt++);
    return;
}

then ISR is running just once, as expected.

Please clarify what I am doing wrong. Thanks in advance.