I'm using the C6457 McBSP in SPI (clock stop) mode.
The C6457 is the master and I am driving a codec, a VLSI VS1053b as a slave.
The VS1053b has a command and data interface that is selected by a GPIO pin, although it shares the actual SPI pins.
What is important is that a transaction for a command completes (i.e. FSX goes high) before I switch to the data interface of the codec or vs-vs. If this does not happen, data could be written in to the codec as if it is a command, and a command as if it is data.
Is there a "correct" way of determining when the FSX has actually returned high? Is there something in the McBSP that I can read in order to know that FSX has actually returned high?
F.Y.I. I'm using 32 bit single SPI frames.
[At present I use a delay loop (based on TI sample code) which is not an ideal solution. I could use a GPIO pin as a ring-back but I really want a "correct" solution to this]
