Hi,
I am interfacing tl16cp754c with am335x and kernel version is from SDK7.
In Device Tree file below mentioned settings for Nand.
gpmc: gpmc@50000000 {
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&nandflash_pins_default>;
pinctrl-1 = <&nandflash_pins_sleep>;
ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
nand@0,0 {
reg = <0 0 0>; /* CS0, offset 0 */
if tl16cp754c is connected in CS1 what offset should be given. In TRM where can be find offset for CS.
gpmc: gpmc@50000000 {
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&nandflash_pins_default>;
pinctrl-1 = <&nandflash_pins_sleep>;
ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
<1 0 ? ?>; /* CS1: Quad UART */
quaduart@1,0 {
reg = <1 0 0>; /* CS1, offset ? */
Regards
Jithin
